STM32F101RDT6TR STMicroelectronics, STM32F101RDT6TR Datasheet - Page 81
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STM32F101RDT6TR
Manufacturer Part Number
STM32F101RDT6TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32F101RET6.pdf
(106 pages)
Specifications of STM32F101RDT6TR
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
36MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
51
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F101RDT6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
STM32F101xC, STM32F101xD, STM32F101xE
5.3.15
5.3.16
TIM timer characteristics
The parameters given in
Refer to
function characteristics (output compare, input capture, external clock, PWM output).
Table 49.
1. TIMx is used as a general term to refer to the TIM1, TIM2, TIM3 and TIM4 timers.
Communications interfaces
I
Unless otherwise specified, the parameters given in
performed under ambient temperature, f
summarized in
The STM32F101xC, STM32F101xD and STM32F101xE access line I
requirements of the standard I
I/O pins SDA and SCL are mapped to are not “true” open-drain. When configured as open-
drain, the PMOS connected between the I/O pin and V
The I
characteristics
and SCL) .
t
2
MAX_COUNT
t
C interface characteristics
COUNTER
Symbol
t
Res
res(TIM)
f
EXT
2
C characteristics are described in
TIM
Section 5.3.13: I/O port characteristics
TIMx
Timer resolution time
Timer external clock
frequency on CH1 to CH4
Timer resolution
16-bit counter clock period
when internal clock is
selected
Maximum possible count
for more details on the input/output alternate function characteristics (SDA
Table
(1)
characteristics
Parameter
10.
Table 49
2
Doc ID 14610 Rev 7
C communication protocol with the following restrictions: t he
are guaranteed by design.
f
f
TIMxCLK
f
f
TIMxCLK
TIMxCLK
TIMxCLK
PCLK1
Table
Conditions
frequency and V
50. Refer also to
= 36 MHz
= 36 MHz
= 36 MHz 0.0278
= 36 MHz
for details on the input/output alternate
Table 50
DD
is disabled, but is still present.
27.8
Min
1
0
0
1
are derived from tests
DD
Section 5.3.13: I/O port
Electrical characteristics
supply voltage conditions
65536 × 65536
f
2
TIMxCLK
C interface meets the
65536
119.2
1820
Max
18
16
/2
t
t
t
TIMxCLK
TIMxCLK
TIMxCLK
MHz
MHz
Unit
ns
bit
µs
81/106
s