MT4HTF3264HZ-667G1 Micron Technology Inc, MT4HTF3264HZ-667G1 Datasheet
MT4HTF3264HZ-667G1
Specifications of MT4HTF3264HZ-667G1
Related parts for MT4HTF3264HZ-667G1
MT4HTF3264HZ-667G1 Summary of contents
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... DDR2 SDRAM SODIMM MT4HTF3264HZ – 256MB MT4HTF6464HZ – 512MB MT4HTF12864HZ – 1GB Features • 200-pin, small-outline dual in-line memory module (SODIMM) • Fast data transfer rates: PC2-3200, PC2-4200, PC2-5300, or PC2-6400 • 256MB (32 Meg x 64), 512MB (64 Meg x 64), 1GB (128 Meg x 64) • ...
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... Part Number Density MT4HTF6464H(I)Z-80E__ MT4HTF6464H(I)Z-800__ MT4HTF6464H(I)Z-667__ Table 5: Part Numbers and Timing Parameters – 1GB Modules 1 Base device: MT47H128M16, 2Gb DDR2 SDRAM Module 2 Part Number Density MT4HTF12864H(I)Z-80E__ MT4HTF12864H(I)Z-800__ MT4HTF12864H(I)Z-667__ 1. The data sheet for the base device can be found on Micron’s Web site. ...
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Pin Assignments Table 6: Pin Assignments 200-Pin DDR2 SODIMM Front Pin Symbol Pin Symbol Pin DQS2 101 REF 103 DQ0 55 DQ18 105 7 DQ1 57 DQ19 107 9 V ...
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... Check bits. Used for system error detection and correction. Data input/output: Bidirectional data bus. Data strobe: Travels with the DQ and is used to capture DQ at the DRAM or the con- troller. Output with read data; input with write data for source synchronous opera- tion. DQS# is only used when differential data strobe mode is enabled via the LOAD MODE command ...
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Table 7: Pin Descriptions (Continued) Symbol Type SDA I/O RDQSx, Output RDQS#x Err_Out# Output (open drain Supply DD DDQ V Supply DDSPD V Supply REF V Supply SS – NC – NF – NU – RFU PDF: 09005aef83c05a5d ...
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... DQ56 DQ DQ57 DQ DQ58 DQ DQ59 DQ DQ60 DQ DQ61 DQ DQ62 DQ DQ63 6 Functional Block Diagram BA[2/1:0] BA[2/1:0]: DDR2 SDRAM A[13/12:0] A[13/12:0]: DDR2 SDRAM RAS# RAS#: DDR2 SDRAM CS# CAS# CAS#: DDR2 SDRAM WE# WE#: DDR2 SDRAM CKE0 CKE0: DDR2 SDRAM ODT0 ODT0: DDR2 SDRAM V Serial PD DDSPD V DDR2 SDRAM ...
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... DDR architecture to achieve high-speed operation. DDR2 architecture is essentially a 4n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for the DDR2 SDRAM module effectively consists of a single 4n-bit-wide, one-clock-cycle data transfer at the internal DRAM core and eight corresponding n-bit-wide, one-half-clock-cycle data trans- fers at the I/O pins ...
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... V leakage current; V VREF REF T Module ambient operating temperature DDR2 SDRAM component operating tem perature 1. The refresh rate is required to double when T Notes: 2. For further information, refer to technical note TN-00-08: "Thermal Applications," avail- PDF: 09005aef83c05a5d htf4c32_64_128x64hz.pdf - Rev. C 9/10 EN 256MB, 512MB, 1GB (x64, SR) 200-Pin DDR2 SODIMM ...
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... Power Operating voltages are specified at the DRAM, not at the edge connector of the module. Designers must account for any system voltage drops at anticipated power levels to en- sure the required supply voltage is maintained. ...
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... I Specifications DD Table 10: DDR2 I Specifications and Conditions – 256MB DD Values shown for MT47H32M16 DDR2 SDRAM only and are computed from values specified in the 512Mb (32 Meg x 16) component data sheet Parameter Operating one bank active-precharge current RAS = RAS MIN (I ); CKE is HIGH HIGH between valid commands; Address bus DD inputs are switching ...
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... Table 11: DDR2 I Specifications and Conditions – 512MB (Die Revision E and G) DD Values shown for MT47H64M16 DDR2 SDRAM only and are computed from values specified in the 1Gb (64 Meg x 16) com- ponent data sheet Parameter Operating one bank active-precharge current RAS = RAS MIN (I ) ...
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... Table 12: DDR2 I Specifications and Conditions – 512MB (Die Revision H) DD Values shown for MT47H64M16 DDR2 SDRAM only and are computed from values specified in the 1Gb (64 Meg x 16) com- ponent data sheet Parameter Operating one bank active-precharge current RAS = RAS MIN (I ); CKE is HIGH HIGH between valid commands; Address bus DD inputs are switching ...
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... Table 13: DDR2 I Specifications and Conditions – 1GB DD Values shown for MT47H128M16 DDR2 SDRAM only and are computed from values specified in the 2Gb (128 Meg x 16) component data sheet Parameter Operating one bank active-precharge current RAS = RAS MIN (I ); CKE is HIGH HIGH between valid commands; Address bus DD inputs are switching ...
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Serial Presence-Detect For the latest SPD data, refer to Micron's SPD page: www.micron.com/SPD. Table 14: SPD EEPROM Operating Conditions Parameter/Condition Supply voltage Input high voltage: logic 1; All inputs Input low voltage: logic 0; All inputs Output low voltage: I ...
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Module Dimensions Figure 3: 200-Pin DDR2 SODIMM 2.0 (0.079) R (2X) 1.80 (0.071) (2X) 6.0 (0.236) TYP PIN 1 2.0 (0.079) TYP 16.25 (0.64) TYP 45° 4X 3.5 (0.138) TYP PIN 200 1. All dimensions are in millimeters (inches); MAX/MIN ...