DC1018B-B Linear Technology, DC1018B-B Datasheet - Page 14

• Manufacturer Part Number: DC1018B-B
• Description: LT4356-2 Overvoltage Protection Regulator With Auto-retry, Aux Amplifier Remains On During Shutdown
• Manufacturer: Linear Technology
• Series: -r

Specifications of DC1018B-B

• Design Resources: DC1018B Design File DC1018B Schematic
• Main Purpose: Overvoltage Protection
• Embedded: No
• Utilized Ic / Part: LT4356-2
• Primary Attributes: -
• Secondary Attributes: -
• Kit Application Type: Power Management
• Application Sub Type: Overvoltage Protection
• Features: Triple Layout For D-PAK Or S-8 MOSFETs , LEDs Show Input, Outputs, Fault & Enable
• Lead Free Status / Rohs Status: Not applicable / Not applicable

APPLICATIONS INFORMATION
LT4356-1/LT4356-2
MOSFET stress is the result of power dissipated within
the device. For long duration surges of 100ms or more,
stress is increasingly dominated by heat transfer; this is
a matter of device packaging and mounting, and heatsink
thermal mass. This is analyzed by simulation, using the
MOSFET thermal model.
For short duration transients of less than 100ms, MOSFET
survival is increasingly a matter of safe operating area
(SOA), an intrinsic property of the MOSFET. SOA quanti-
fi es the time required at any given condition of V
I
rated maximum. MOSFET SOA is expressed in units of
watt-squared-seconds (P
stant for intervals of less than 100ms for any given device
type, and rises to infi nity under DC operating conditions.
Destruction mechanisms other than bulk die temperature
distort the lines of an accurately drawn SOA graph so that
P
In particular P
maximum rating, rendering some devices useless for
absorbing energy above a certain voltage.
Calculating Transient Stress
To select a MOSFET suitable for any given application, the
SOA stress must be calculated for each input transient
which shall not interrupt operation. It is then a simple matter
to chose a device which has adequate SOA to survive the
maximum calculated stress. P
waveform is calculated as follows (Figure 4).
Let
Then
14
P
D
2
2
t is not the same for all combinations of I
to raise the junction temperature of the MOSFET to its
a = V
b = V
(V
t = I
IN
LOAD
= Nominal Input Voltage)
REG
PK
2
– V
– V
⎡
⎢
⎢
⎣
3
1
2
IN
tr
t tends to degrade as V
IN
(
b − a
b
)
3
+
2
t). This fi gure is essentially con-
2
1
τ 2a
2
⎛
⎝ ⎜
t for a prototypical transient
2
ln
b
a
DS
+ 3a
approaches the
2
+ b
D
2
and V
− 4ab
DS
and
DS
⎞
⎠ ⎟
⎤
⎥
⎥
⎦
.
Typically V
For the transient conditions of V
= 16V, t
is 18.4W
age. The P
integrating the square of MOSFET power versus time.
Calculating Short-Circuit Stress
SOA stress must also be calculated for short-circuit condi-
tions. Short-circuit P
where, ΔV
overcurrent timer interval.
For V
= 100nF , P
calculated in the previous example. Nevertheless, to
account for circuit tolerances this fi gure should be doubled
to 13.2W
Limiting Inrush Current and GATE Pin Compensation
The LT4356 limits the inrush current to any load capacitance
by controlling the GATE pin voltage slew rate. An external
capacitor can be connected from GATE to ground to slow
down the inrush current further at the expense of slower
turn-off time. The gate capacitor is set at:
V
IN
Figure 4. Safe Operating Area Required to Survive Prototypical
Transient Waveform
P
P
C1 =
V
2
REG
2
t = (V
IN
t =
r
= 14.7V, V
= 10μs and τ = 1ms, and a load current of 3A, P
2
I
2
GATE(UP)
2
1
s—easily handled by a MOSFET in a D-pak pack-
I
2
SNS
s.
INRUSH
REG
IN
t of other transient waveshapes is evaluated by
2
I
t is 6.6W
LOAD
• ΔV
is the SENSE pin threshold, and t
≈ V
2
SNS
IN
SNS
t
•C
V
r
(
PK
V
and τ >> t
2
/R
L
PK
t is given by:
2
= 50mV, R
SNS
s—less than the transient SOA
– V
)
REG
2
• t
r
)
simplifying the above to
TMR
PK
2
SNS
τ
= 80V, V
= 12mΩ and C
(W
(W
IN
2
2
s)
s)
= 12V, V
TMR
is the
4356fa
TMR
REG
4356 F04
2
t