LSM320DLTR STMicroelectronics, LSM320DLTR Datasheet - Page 43

• Manufacturer Part Number: LSM320DLTR
• Description: IC LINEAR
• Manufacturer: STMicroelectronics

Specifications of LSM320DLTR

• Lead Free Status / Rohs Status: Compliant

LSM320DL
Table 75.
Figure 12. INT1_Sel and Out_Sel configuration block diagram
Table 76.
Table 77.
INT1_Sel1-
INT1_Sel0
Out_Sel1-
Out_Sel0
ADC
Hpen
Hpen
0
1
x
x
x
x
LPF1
CTRL_REG5_G description (continued)
Out_Sel configuration setting
INT_SEL configuration setting
INT1 selection configuration. Default value: 0
(see
Out selection configuration. Default value: 0
(see
OUT_SEL1
INT_SEL1
Table
Table
0
0
0
0
1
1
HPF
77)
76)
Doc ID 018845 Rev 1
OUT_SEL0
INT_SEL2
HPen
0
1
0
1
0
1
x
x
LPF2
Non-high-pass-filtered data are used for
interrupt generation
High-pass-filtered data are used for interrupt
generation
Data in DataReg and FIFO are non-high-
pass-filtered
Data in DataReg and FIFO are high-pass-
filtered
Data in DataReg and FIFO are low-pass-
filtered by LPF2
Data in DataReg and FIFO are high-pass and
low-pass-filtered by LPF2
Description
Description
10
11
00
01
10
01
11
00
Out_Sel <1:0>
Registers description
INT1_Sel <1:0>
DataReg
32x16x3
generator
Interrupt
FIFO
AM09276V1
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