AD9981/PCBZ Analog Devices Inc, AD9981/PCBZ Datasheet - Page 6

• Manufacturer Part Number: AD9981/PCBZ
• Manufacturer: Analog Devices Inc

Specifications of AD9981/PCBZ

• Lead Free Status / Rohs Status: Supplier Unconfirmed

AD9981/PCB
Status Registers (Read-Only)
Registers 0x24 to 0x27 are read-only registers that provide
status for Hsync, Vsync, and SOG Detection (0x24), Hsync,
Vsync, Coast, and Clamp Polarity (0x25), and the Hsync per
Vsync Counter (0x16 to 0x27). Performing a read (by clicking
Read) lets you see the status of each of these bits. The status is
also reflected in the text to the right of each of these bits.
SAMPLE SETTINGS FOR THE EVALUATION BOARD
Table 1. Sample Settings
Mode
VGA
SVGA
XGA
SXGA
TV
1
The VCO Range and Charge Pump Current settings are preliminary and may need slight adjustments.
Resolution
640 × 480 at 60 Hz
640 × 480 at 72 Hz
640 × 480 at 75 Hz
640 × 480 at 85 Hz
800 × 600 at 56 Hz
800 × 600 at 60 Hz
800 × 600 at 72 Hz
800 × 600 at 75 Hz
800 × 600 @ at 85 Hz
1024 × 768 at 60 Hz
1024 × 768 at 70 Hz
1024 × 768 at 75 Hz
1024 × 768 at 80 Hz
1024 × 768 at 85 Hz
1280 × 1024 at 60 Hz
480i
480p
720p
1080i
1080p @30 Hz
Nominal
Frequency Hs (kHz)
31.469
37.861
37.500
43.269
35.156
37.879
48.077
46.875
53.674
48.363
56.476
60.023
64.000
68.677
60.020
15.750
31.470
45.000
33.750
33.750
Nominal Pixel
Clock (MHz)
25.175
31.500
31.500
36.000
36.000
40.000
50.000
49.500
56.250
65.000
75.000
78.750
85.500
94.50
108.000
13.510
27.000
74.250
74.250
74.250
Rev. 0 | Page 6 of 12
800
1024
1688
858
PLL Divider
832
840
832
1056
1040
1056
1048
1344
1328
1312
1336
1376
858
1650
2200
2200
PLL Settings
VCO
Range
(0x03 7:6)
00
01
01
01
01
01
01
01
01
10
10
10
10
10
10
00
00
10
10
10
1
Charge Pump
Current
(0x03 5:3)
101
011
011
100
100
100
110
110
111
001
100
110
100
100
101
101
110
100
100
100
1
ADC Setting
Latch Select
(0x2D 4:3)
01
01
01
01
01
01
01
01
01
01
01
01
01
01
10
01
01
01
01
01