DS26528G+ Maxim Integrated Products, DS26528G+ Datasheet - Page 238
![IC TXRX T1/E1/J1 OCT 256-CSBGA](/photos/6/50/65053/256-csbga_21-0315_sml.jpg)
DS26528G+
Manufacturer Part Number
DS26528G+
Description
IC TXRX T1/E1/J1 OCT 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet
1.DS26528G.pdf
(276 pages)
Specifications of DS26528G+
Number Of Drivers/receivers
4/4
Protocol
IEEE 1149.1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Figure 10-6. T1 Receive-Side Interleave Bus Operation—BYTE Mode
RSYNC
SYSCLK
RSER
RSYNC
RSER
RSIG
RSER
RSIG
RSER
RSIG
RSIG
Notes:
1. 4.096 MHz bus configuration.
2. 8.192 MHz bus configuration.
3. 16.384 MHz bus configuration.
4. RSYNC is in the input mode (RIOCR.2 = 0).
5. Shows system implementation with multiple DS26528 cores driving the backplane.
6. Though not shown, RCHCLK continues to mark the channel LSB for the framers active period.
7. Though not shown, RCHBLK continues to mark the blocked channels for the framers active period.
1
2
3
1
2
3
4
Ch32
Ch32
FR4
FR4
FR2 CH32
FR2 CH32
Framer 3, Channel 32
Framer 3, Channel 32
Ch32
FR1 CH132
Ch32
FR1 CH 32
FR5
FR5
A
B
Ch32
Ch32
FR3 CH32
FR6
FR6
FR3 CH32
C/A D/B
Ch32
Ch32
FR7
FR7
LSB MSB
FR0
Ch1
FR0
Ch1
FR0 CH1
FR0 CH1
FR1
Ch1
FR1
Ch1
Framer 0, Channel 1
Framer 0, Channel 1
FR0 CH1
FR0 CH1
FR2
Ch1
FR2
Ch1
FR1 CH1
FR1 CH1
A
BIT DETAIL
FR3
Ch1
FR3
Ch1
B
238 of 276
C/A D/B
FR4
Ch1
FR4
Ch1
FR2 CH1
FR2 CH1
LSB MSB
FR5
FR5
Ch1
Ch1
FR1 CH1
FR1 CH1
FR3 CH1
FR6
Ch1
FR6
Ch1
FR3 CH1
Framer 1, Channel 1
Framer 1, Channel 1
FR7
Ch1
FR7
Ch1
A
FR0
Ch2
FR0
Ch2
FR0 CH2
FR0 CH2
DS26528 Octal T1/E1/J1 Transceiver
B
FR1
Ch2
FR1
Ch2
C/A D/B
FR0 CH2
FR0 CH2
LSB MSB
FR2
Ch2
FR2
Ch2
FR1 CH2
FR1 CH2
FR3
Ch2
FR3
Ch2
FR4
Ch2
FR4
Ch2
FR2 CH2
FR2 CH2
FR5
FR5
Ch2
Ch2
FR1 CH2
FR1 CH2
A
B
FR3 CH2
FR6
Ch2
FR6
Ch2
FR3 CH2
FR7
Ch2
FR7
Ch2
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