MIC5822BN Micrel Inc, MIC5822BN Datasheet - Page 5

IC DRVR LATCH 8BIT SER IN 16DIP

MIC5822BN

Manufacturer Part Number
MIC5822BN
Description
IC DRVR LATCH 8BIT SER IN 16DIP
Manufacturer
Micrel Inc
Type
Driverr
Datasheet

Specifications of MIC5822BN

Number Of Drivers/receivers
8/0
Voltage - Supply
5V
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Protocol
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MIC5822BN
Manufacturer:
AT&T
Quantity:
6 263
Timing Conditions
(T
A. Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) ....................................................................... 75 ns
B. Minimum Data Active Time After Clock Pulse (Data Hold Time) ............................................................................. 75 ns
C. Minimum Data Pulse Width .................................................................................................................................... 150 ns
D. Minimum Clock Pulse Width ................................................................................................................................... 150 ns
E. Minimum Time Between Clock Activation and Strobe ............................................................................................ 300 ns
F. Minimum Strobe Pulse Width .................................................................................................................................. 100 ns
G. Typical Time Between Strobe Activation and Output Transition ............................................................................. 500 ns
SERIAL DATA present at the input is transferred to the shift register on the logic “0” to logic “1” transition of the CLOCK input
pulse. On succeeding CLOCK pulses, the registers shift data information towards the SERIAL DATA OUTPUT. The SERIAL
DATA must appear at the input prior to the rising edge of the CLOCK input waveform.
Information present at any register is transferred to its respective latch when the STROBE is high (serial-to-parallel conversion).
The latches will continue to accept new data as long as the STROBE is held high. Applications where the latches are bypassed
(STROBE tied high) will require that the ENABLE input be high during serial entry.
When the ENABLE input is high, all of the output buffers are disabled (OFF) without affecting the information stored in the
latches or shift register. With the ENABLE input low, the outputs are controlled by the state of the latches.
Typical Applications
February 2005
MIC5821/5822
A
= +25°C, Logic Levels are V
MIC5822 Level Shifting Lamp Driver with Darlington Emitters Tied to a Negative Supply
SERIAL DATA CLOCK
-9V
+
DD
100µ
0.1µ
+5V
and V
SS
)
1
2
3
4
5
6
7
8
SUB
5
16
15
14
13
12
11
10
9
MIC5821/5822
V
Micrel, Inc.
DD
= 5.0V

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