SI5100-G-BC Silicon Laboratories Inc, SI5100-G-BC Datasheet - Page 7

• Manufacturer Part Number: SI5100-G-BC
• Description: IC TXRX SERIAL/DESERIAL 195CBGA
• Manufacturer: Silicon Laboratories Inc
• Type: Transceiverr
• Series: SiPHY®r

Specifications of SI5100-G-BC

• Package / Case: 196-BGA
• Number Of Drivers/receivers: 1/1
• Protocol: SONET/SDH
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Product: Telecom
• Supply Voltage (max): 1.89 V, 3.47 V
• Supply Voltage (min): 1.71 V
• Supply Current: 0.83 A
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 20 C
• Mounting Style: SMD/SMT
• Maximum Power Dissipation: 1600 mW
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 336-1308; SI5100-G-BC

Both the motherboard and daughter card are placed in line loopback mode before shipment to customers.
Note: Jump the VDD_IO selection jumper toward the 3.3 V side.
Header—Pin
Header—Pin
JP1—14
JP1—11
JP1—20
JP1—23
JP1—17
JP1—14
JP1—11
JP8—2
JP1—8
JP1—5
JP1—2
JP2—5
JP2—2
JP3—8
JP3—5
JP3—2
JP7—5
JP7—2
JP6—4
JP1—8
JP1—5
JP1—2
Header—Pin
JP10—2
JP1—14
JP1—11
JP1—8
JP1—5
JP1—2
JP2—5
JP2—2
JP3—8
JP3—5
JP3—2
JP7—5
JP7—2
JP6—4
Si5530 REFRATE
Si5530 RESET_N
RXCLK1DSBL_N
RXCLK2DSBL_N
Signal Name
TXSQLCH_N
TXCLKDSBL
RXCLK2DIV_N
TXMSBSEL
RXMSBSEL
Voltage Select
RXSQLCH_N
Signal Name
FIFORST_N
MODE16
BWSEL0
BWSEL1
REFSEL
REFRATE
RESET_N
LPTM_N
DLBK_N
LLBK_N
RXCLK1DSBL_N
RXCLK2DSBL_N
LTR_N
RXCLK2DIV_N
Voltage Select
Signal Name
RXSQLCH_N
RXRESET_N
TXREFRATE
TXRESET_N
RXREFRATE
FIFORST_N
LPTM_N
DLBK_N
LLBK_N
LTR_N
Table 2. Full-Duplex Motherboard Setup
low (enables line loopback)
(for widest CMU loop
Table 1. Loopback Motherboard Setup
Table 3. Si5100 Daughter Card Setup
Line Loopback
bandwidth)
Line Loopback
tie to FIFOERR
don’t care
don’t care
high
high
high
low
low
low
11
low (enables line loopback)
3.3 V
open
high
high
high
high
high
high
high
low
Preliminary Rev. 0.5
Line Loopback
tie to FIFOERR
don’t care
don’t care
3.3 V
open
high
high
high
high
high
high
high
low
Asynchronous TX/RX
(for widest CMU loop
Asynchronous TX/RX
tie to FIFOERR
bandwidth)
don’t care
don’t care
high
high
high
low
low
low
Si5100/Si5110-EVB
11
3.3 V
open
high
high
high
high
high
high
high
high
high
Asynchronous TX/RX
tie to FIFOERR
don’t care
don’t care
3.3 V
open
high
high
high
high
high
high
high
high
high
Diagnostic Loopback
Diagnostic Loopback
(for widest CMU loop
tie to FIFOERR
bandwidth)
don’t care
don’t care
3.3 V
open
high
high
high
high
high
high
high
high
high
high
high
low
low
low
low
11
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