ZLF645S0P2832G Zilog, ZLF645S0P2832G Datasheet - Page 28

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ZLF645S0P2832G

Manufacturer Part Number
ZLF645S0P2832G
Description
Microcontrollers (MCU) 32K Flash 512B RAM 28 pin
Manufacturer
Zilog
Datasheet

Specifications of ZLF645S0P2832G

Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
512 KB
Interface Type
ICP, UART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Package / Case
PDIP-28
Minimum Operating Temperature
0 C
Lead Free Status / Rohs Status
 Details
PS026407-0408
Open-Drain
I/O
Out
In
Port 0
Port 0 is an 8-bit bidirectional CMOS-compatible port. Its eight I/O lines are configured
under software control to create a nibble I/O port. The output drivers are push/pull or
open-drain, controlled by bit 2 of the
If one or both nibbles are required for I/O operation, they must be configured by writing to
the
configured as an input port.
Port 0, bit 7 is used as the transmit output of the UART when UART Tx is enabled. The
I/O function of Port 0, bit 7 is overridden by the UART serial output (TxD) when UART
Tx is enabled (UCTL[7] = 1). The pin must be configured as an output for TxD data to
reach the pin (P01M[6] = 0).
An optional pull-up transistor is available as an user-selectable flash programming option
on all Port 0 bits with nibble select.
Port 0/1 Mode
FLASH MCU
ZLF645
Register. After a hardware reset or a Stop Mode Recovery, Port 0 is
Figure 6. Port 0 Configuration
4
4
Figure 6
Port Configuration
displays the Port 0 configuration.
Port 0 (I/O)
Register.
ZLF645 Series Flash MCUs
Product Specification
V
DD
Resistive pull-up
Option
transistor
Flash Programming
Pad
Port 0
20

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