MCP2122-E/SN Microchip Technology, MCP2122-E/SN Datasheet - Page 9

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MCP2122-E/SN

Manufacturer Part Number
MCP2122-E/SN
Description
IC ENCODER/DECODER IRDA 8SOIC
Manufacturer
Microchip Technology
Type
Infrared Encoder/Decoderr
Datasheets

Specifications of MCP2122-E/SN

Package / Case
8-SOIC (3.9mm Width)
Applications
Data-Logging, Data Exchange
Voltage - Supply, Analog
1.8 V ~ 5.5 V
Voltage - Supply, Digital
1.8 V ~ 5.5 V
Mounting Type
Surface Mount
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Ic Function
Encoder / Decoder IC
Supply Voltage Range
1.8V To 5.5V
Operating Temperature Range
-40°C To +125°C
Digital Ic Case Style
SOIC
No. Of Pins
8
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP212XDM - BOARD DEVELOPMENT IRDA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MCP2122-E/SNG
MCP2122-E/SNG

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Manufacturer
Quantity
Price
Part Number:
MCP2122-E/SN
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Manufacturer:
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20 000
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2.5.3
Table 2-4
common baud rates. The internal TXIR pulse-width
high-time limiter is a feature that minimizes the system
current consumption at lower baud rates. The IrDA
standard specification requires that optical receiver cir-
cuitry detect pulses as narrow as 1.41 µs (1.63 µs is
the typical time at 115200 baud). Therefore, the time
that the TXIR pin is high after this valid detection is
additional current that is driven by the emitter LED. The
MCP2122 will force the TXIR pin low once the pulse-
width limiter has timed out.
MCP2122 16XCLK, TX and TXIR waveforms at
115200 baud for a single TX low bit. In this case, the
TXIR is high for three 16XCLK pulses. In
the MCP2122 is at 9600 baud for a single TX low bit. In
this case, the TXIR is high for 3.55 µs (determined by
pulse-width limiter circuit).
FIGURE 2-9:
© 2007 Microchip Technology Inc.
shows the TXIR pin high-time at different
ENCODING AND SCREEN
CAPTURES
TXIR
MCP2122 AT 115200 BAUD WAVEFORM
A B
Jitter of the TX input relative to the 16XCLK and TXIR
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Figure 2-9
Figure
shows the
2-10,
Preliminary
TABLE 2-4:
9600
19200
38400
57600
115200
Baud
Rate
Note 1: The pulse-width limiter on the TXIR pin
2: This TXIR pulse width time is a design
3: This time (determined by the pulse-width
19.53 µs
3xT
9.77 µs
4.88 µs
3.26 µs
1.63 µs
Circuit
saves system current for this baud rate.
target and is not tested. Actual times may
be greater than, or less than, this value.
limiter circuit) is device dependent.
16
XCLK
TXIR HIGH PULSE WIDTH
(1)
(1)
(1)
TXIR Pulse Width
Pulse-width
16XCLK Pulse
Limiter
4.00 µs
4.00 µs
4.00 µs
4.00 µs
4.00 µs
Circuit
MCP2122
(2)
DS21894C-page 9
Actual Pulse
4.00 µs
4.00 µs
4.00 µs
3.26 µs
1.63 µs
Width
(3)
(3)
(3)

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