Z8623012PSC Zilog, Z8623012PSC Datasheet - Page 12

IC SMART V-CHIP W/2ND I2C 18-DIP

Z8623012PSC

Manufacturer Part Number
Z8623012PSC
Description
IC SMART V-CHIP W/2ND I2C 18-DIP
Manufacturer
Zilog
Type
Video Decoderr
Datasheets

Specifications of Z8623012PSC

Applications
Set-Top Boxes, TV
Voltage - Supply, Digital
4.75 V ~ 5.25 V
Mounting Type
Through Hole
Package / Case
18-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Voltage - Supply, Analog
-
1.1.6 Decoder Control Circuit
1.1.7 Voltage/Current Reference
12
A
RCHITECTURAL
The Decoder Control circuit block is the users communications port. This circuit
converts the information from the control port into the internal control signals
required to establish the operating mode of the decoder.
The Z86230 responds to its slave address for both the
tions. If the
responds with an Acknowledge. The master should then send an address byte fol-
lowed by a data byte. If the
the Z86230 responds with an Acknowledge followed sequentially by a status byte
and a data byte.
addressing exhibits both indirect and direct modes. The busy bit in the status byte
indicates if the
The Voltage/Current reference circuit uses an externally connected resistor to
establish the reference levels that are used throughout the Z86230. For a minimal
investment, the use of an external resistor can also provide improved internal pre-
cision.
F
IGURE
2. V
O
VERVIEW
READ
OLTAGE
RREF
WRITE
Z86230—PRELIMINARY
READ
bit is Low (indicating a
/C
IRCUIT
Pi n 10
data is only available through indirect addressing.
operation is completed or if
READ
R
EFERENCE
GND
bit is High (indicating a
10 k ±2%
B
LOCK
WRITE
D
IAGRAM AND
sequence), then the Z86230
READ
READ
data is available.
READ
O
and
PS000401-TVC0699
PERATIONAL
WRITE
sequence), then
O
condi-
WRITE
VERVIEW

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