Z8623012SSG Zilog, Z8623012SSG Datasheet - Page 13

• Manufacturer Part Number: Z8623012SSG
• Description: IC SMART V-CHIP W/2ND I2C 18SOIC
• Manufacturer: Zilog
• Type: Video Decoderr

Specifications of Z8623012SSG

• Applications: Set-Top Boxes, TV
• Voltage - Supply, Digital: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Package / Case: 18-SOIC (7.5mm Width)
• Processor Series: Z8623x
• Core: Z80
• Data Bus Width: 8 bit
• Program Memory Type: CMOS
• Maximum Clock Frequency: 12 MHz
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply, Analog: -
• Lead Free Status / Rohs Status: Details

2.
T
PS000401-TVC0699
Symbol
I
H SEL
X
NRST
2
ABLE
C SEL
OUT
PIN DESCRIPTIONS
1. P
IN
Pin #
1
2
3
4
D
ESCRIPTIONS
Function
I
HIN/XIN Select
XTAL Output
RESET
2
C Address Select
B
There are 2 different packages, 18-pin DIP and 18-pin SOIC, available in the
Z86230.
F
LOCK
IGURE
D
3. 18-P
IAGRAM AND
I
HIN/XIN
CSYNC
2
VIDEO
H SEL
C SEL
X
NRST
V
OUT
LPF
SS
IN
Z86230—PRELIMINARY
DIP
O
Direction
Input
Input
Output
Input
PERATIONAL
AND
SOIC D
1
2
3
4
5
6
8
9
7
O
Description
Selects I
address to 28h for WRITE and 29h for
READ. HIGH(1) sets the slave address to 2Ah
for WRITE and 2Bh for READ.
Selects the source of the horizontal frequency
signal. Tying pin 2 HIGH(1) selects XIN mode.
Tying pin 2 Low(0) selects HIN mode.
When operating in XIN mode this pin is the
output pin for the XTAL circuit. In HIN mode,
the X
Capable of being tied to an RESET signal if a
Power-On Reset action is required. RESET
must be held Low(0) for at least 100ns;
otherwise, the pin must be tied HIGH(1).
VERVIEW
DIP/SOIC
EVICES
Z86230
OUT
2
C Address. Low(0) sets the slave
pin is a no connect (NC).
18
17
16
15
14
13
12
11
10
P
NC
NC
SCLK
SDA
RREF
INTRO
PB
V
V
IN
DD
SS
D
(A)
ESCRIPTIONS
13