ADV7194KST Analog Devices Inc, ADV7194KST Datasheet - Page 6

• Manufacturer Part Number: ADV7194KST
• Description: IC ENCODER VIDEO EXT-10 80-LQFP
• Manufacturer: Analog Devices Inc
• Type: Video Encoderr

Specifications of ADV7194KST

• Rohs Status: RoHS non-compliant
• Applications: DVD, PC Video, Multimedia
• Voltage - Supply, Analog: 3.3 V ~ 5 V
• Voltage - Supply, Digital: 3.3 V ~ 5 V
• Mounting Type: Surface Mount
• Package / Case: 80-LQFP
• Number Of Dac's: 6
• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: LQFP
• Pin Count: 80
• For Use With: EVAL-ADV7194EB - BOARD EVAL FOR ADV7194
• Lead Free Status / RoHS Status: Not Compliant

5 V TIMING CHARACTERISTICS
Parameter
MPU PORT
ANALOG OUTPUTS
CLOCK CONTROL AND PIXEL
TELETEXT PORT
RESET CONTROL
PLL
NOTES
1
2
3
4
Specifications subject to change without notice.
ADV7194
Temperature range T
Guaranteed by characterization.
Pixel Port consists of the following:
Teletext Port consists of:
Data: P0–P9, Y0/P10–Y9/P19,
Control: HSYNC, VSYNC, BLANK
Clock: CLKIN Input.
Digital Output: TTXRQ,
Data: TTX.
SCLOCK Frequency
SCLOCK High Pulsewidth, t
SCLOCK Low Pulsewidth, t
Hold Time (Start Condition), t
Setup Time (Start Condition), t
Data Setup Time, t
SDATA, SCLOCK Rise Time, t
SDATA, SCLOCK Fall Time, t
Setup Time (Stop Condition), t
Analog Output Delay
DAC Analog Output Skew
PORT
Digital Output Access Time, t
Data Setup Time, t
Data Hold Time, t
Reset Low Time
PLL Output Frequency
f
Clock High Time, t
Clock Low Time, t
Data Setup Time, t
Data Hold Time, t
Control Setup Time, t
Control Hold Time, t
Digital Output Access Time, t
Digital Output Hold Time, t
Pipeline Delay, t
Pipeline Delay, t
2
CLOCK
3
2
MIN
15
15
4
18
to T
5
17
(2× Oversampling)
(4× Oversampling)
2
12
10
11
9
MAX
12
11
: 0°C to 70°C.
2
1
16
14
3
8
4
7
13
6
Min
0.6
1.3
0.6
0.6
100
0.6
8
8
6
5
6
4
0
(V
specifications T
AA
Typ
8
0.1
27
13
12
57
67
11
3
6
3
54
= 5 V
250 mV, V
Max
400
300
300
24
20
MIN
to T
MAX
REF
Unit
kHz
µs
µs
µs
µs
ns
ns
ns
µs
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Clock Cycles
Clock Cycles
ns
ns
ns
ns
MHz
1
= 1.235 V, R
unless otherwise noted.)
SET1,2
Test Conditions
After This Period the First Clock Is Generated
Relevant for Repeated Start Condition
= 1200
unless otherwise noted. All