ADV7177KS-REEL Analog Devices Inc, ADV7177KS-REEL Datasheet - Page 33

IC DAC VIDEO NTSC 3-CH 44MQFP

ADV7177KS-REEL

Manufacturer Part Number
ADV7177KS-REEL
Description
IC DAC VIDEO NTSC 3-CH 44MQFP
Manufacturer
Analog Devices Inc
Type
Video Encoderr
Datasheet

Specifications of ADV7177KS-REEL

Rohs Status
RoHS non-compliant
Applications
Set-Top Boxes, TV
Voltage - Supply, Analog
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
44-MQFP, 44-PQFP
Adc/dac Resolution
9b
Screening Level
Commercial
Package Type
MQFP
Pin Count
44
Voltage - Supply, Digital
-
Lead Free Status / RoHS Status
Not Compliant
BOARD DESIGN AND LAYOUT CONSIDERATIONS
The ADV7177/ADV7178 are highly integrated circuits
containing both precision analog circuitry and high speed
digital circuitry. The parts have been designed to minimize
interference effects on the integrity of the analog circuitry by
the high speed digital circuitry. It is imperative that the same
design and layout techniques be applied to the system-level
design so that high speed and accurate performance is achieved.
Figure 43 shows the analog interface between the device and
monitor. The layout should be optimized for lowest noise on the
ADV7177/ADV7178 power and ground lines by shielding the
digital inputs and providing good decoupling. The lead length
between groups of V
minimize inductive ringing.
GROUND PLANES
The ground plane should encompass all ADV7177/ADV7178
ground pins, voltage reference circuitry, power supply bypass
circuitry for the ADV7177/ADV7178, the analog output traces,
and all digital signal traces leading up to the ADV7177/
ADV7178. The ground plane is the board’s common ground
plane.
POWER PLANES
The ADV7177/ADV7178 and any associated analog circuitry
should have their own power plane, referred to as the analog
power plane (V
the regular PCB power plane (V
ferrite bead. This bead should be located within three inches of
the ADV7177/ADV7178.
The metallization gap separating the device power plane and
board power plane should be as narrow as possible to minimize
the obstruction to the flow of heat from the device into the
general board.
The PCB power plane should provide power to all digital logic
on the PC board, and the analog power plane should provide
power to all ADV7177/ADV7178 power pins and voltage
reference circuitry.
Plane-to-plane noise coupling can be reduced by ensuring that
portions of the regular PCB power and ground planes do not
overlay portions of the analog power plane, unless they can be
arranged so that the plane-to-plane noise is common mode.
AA
). This power plane should be connected to
AA
and GND pins should by minimized to
CC
) at a single point through a
Rev. C | Page 33 of 44
SUPPLY DECOUPLING
For optimum performance, bypass capacitors should be
installed using the shortest leads possible, consistent with
reliable operation, to reduce the lead inductance. Best
performance is obtained with 0.1 µF ceramic capacitor
decoupling. Each group of V
must have at least one 0.1 µF decoupling capacitor to GND.
These capacitors should be placed as close to the device as
possible. Note that while the ADV7177/ADV7178 contains
circuitry to reject power-supply noise, this rejection decreases
with frequency. If a high frequency switching power supply is
used, the designer should pay close attention to reducing power
supply noise and consider using a 3-terminal voltage regulator
for supplying power to the analog power plane.
DIGITAL SIGNAL INTERCONNECT
The digital inputs to the ADV7177/ADV7178 should be
isolated as much as possible from the analog outputs and other
analog circuitry. Also, these input signals should not overlay the
analog power plane.
Due to the high clock rates involved, long clock lines to the
ADV7177/ADV7178 should be avoided to reduce noise pickup.
Any active termination resistors for the digital inputs should be
connected to the regular PCB power plane (V
analog power plane.
ANALOG SIGNAL INTERCONNECT
The ADV7177/ADV7178 should be located as close to the
output connectors as possible to minimize noise pickup and
reflections due to impedance mismatch.
The video output signals should overlay the ground plane, not
the analog power plane, to maximize the high frequency power-
supply rejection. Digital inputs, especially pixel data inputs and
clocking signals, should never overlay any of the analog signal
circuitry and should be kept as far away as possible.
For best performance, the outputs should each have a 75 Ω load
resistor connected to GND. These resistors should be placed as
close as possible to the ADV7177/ADV7178 to minimize
reflections.
The ADV7177/ADV7178 should have no floating inputs. Any
inputs that are not required should be tied to ground.
AA
pins on the ADV7177/ADV7178
ADV7177/ADV7178
CC
) and not to the

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