SX1501I087TRT Semtech, SX1501I087TRT Datasheet - Page 21

• Manufacturer Part Number: SX1501I087TRT
• Description: IC GPIO EXPANDER I2C 4CH 20QFN
• Manufacturer: Semtech

Specifications of SX1501I087TRT

• Interface: I²C
• Number Of I /o: 4
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 1.2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SX1501I087TR

Addr
Addr
0xAB
0x10
0x11
0x12
0x13
0x14
0x15
0x00
0x01
ADVANCED COMMUNICATIONS & SENSING
5.2
Rev 9 – 5
*Bits set as output take “1” as default value.
Name
RegEventStatus
RegPLDMode
RegPLDTable0
RegPLDTable1
RegPLDTable2
RegPLDTable3
RegPLDTable4
RegAdvanced
Name
RegData
RegDir
SX1502 8-channel GPIO
Address
0xAB
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x10
0x11
0x12
0x13
0x14
0x15
th
August 2010
Name
RegData
RegDir
RegPullUp
RegPullDown
Reserved
RegInterruptMask
RegSenseHigh
RegSenseLow
RegInterruptSource
RegEventStatus
RegPLDMode
RegPLDTable0
RegPLDTable1
RegPLDTable2
RegPLDTable3
RegPLDTable4
RegAdvanced
Default
Default
0xXX
0xXX
0xXX
Table 13 – SX1501 Configuration Registers Description
0xFF
0xFF
0x00
0x00
0x00
0x00
Table 14 – SX1502 Configuration Registers Overview
Bits
Bits
7:0
7:0
3:0
7:2
1:0
7:4
7:0
7:0
7:0
7.2
3
2
1
0
7
6
5
4
3
2
1
0
1
0
Description
Data register
Direction register
Pull-up register
Pull-down register
Unused
Interrupt mask register
Sense register for I/O[7:4]
Sense register for I/O[3:0]
Interrupt source register
Event status register
PLD mode register
PLD truth table 0
PLD truth table 1
PLD truth table 2
PLD truth table 3
PLD truth table 4
Advanced settings register
Description
Write: Data to be output to the output-configured IOs
Read: Data seen at the IOs, independent of the direction configured.
Configures direction for each IO.
0 : IO is configured as an output
1 : IO is configured as an input
Description
Event status of all IOs.
0 : No event has occured on this IO
1 : An event has occured on this IO (an edge as configured in relevant RegSense
register occured).
Writing '1' clears the bit in RegEventStatus and in RegInterruptSource if relevant.
If the edge sensitivity of the IO is changed, the bit(s) will be cleared automatically
Reserved. Must be set to 0 (default value)
PLDMode
00 : PLD disabled – Normal GPIO mode for I/O[3:0]
01 : PLD 2-to-1 mode – I/O[2] is a decode of I/O[1:0] as defined in RegPLDTable0
10 : PLD 3-to-1 mode – I/O[3] is a decode of I/O[2:0] as defined in RegPLDTable2
11 : Not used
Reserved. Must be set to 0 (default value)
Value to be output on I/O[2] when I/O[1:0] = 11
Value to be output on I/O[2] when I/O[1:0] = 10
Value to be output on I/O[2] when I/O[1:0] = 01
Value to be output on I/O[2] when I/O[1:0] = 00
Unused
Value to be output on I/O[3] when I/O[2:0] = 111
Value to be output on I/O[3] when I/O[2:0] = 110
Value to be output on I/O[3] when I/O[2:0] = 101
Value to be output on I/O[3] when I/O[2:0] = 100
Value to be output on I/O[3] when I/O[2:0] = 011
Value to be output on I/O[3] when I/O[2:0] = 010
Value to be output on I/O[3] when I/O[2:0] = 001
Value to be output on I/O[3] when I/O[2:0] = 000
Unused
Unused
Reserved. Must be set to 0 (default value)
Boost Mode (Cf. §2.2.1)
0: OFF
1: ON
Reserved. Must be set to 0 (default value)
21
4/8/16 Channel Low Voltage GPIO
SX1501/SX1502/SX1503
Applies only when PLDMode is
set to PLD 2-to-1 mode
Applies only when PLDMode is
set to PLD 3-to-1 mode
www.semtech.com
XXXX XXXX
1111 1111
1111 1111
0000 0000
0000 0000
1111 1111
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
Default
*