SI2401-FS Silicon Laboratories Inc, SI2401-FS Datasheet - Page 33

• Manufacturer Part Number: SI2401-FS
• Description: IC ISOMODEM SYSTEM-SIDE 16SOIC
• Manufacturer: Silicon Laboratories Inc
• Type: Integrated Global DAAr

Specifications of SI2401-FS

• Package / Case: 16-SOIC (3.9mm Width)
• Data Format: V.21, V.22, V.23, Bell 103, Bell 212A
• Baud Rates: 2.4k
• Interface: UART
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Product: Modem Chip
• Supply Voltage (min): 3 V
• Supply Current: 15 mA
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 10 C
• Mounting Style: SMD/SMT
• Package: 16SOIC
• Main Category: Chipset
• Sub-category: ISOmodem
• Maximum Data Rate: 2.4 Kbps
• Typical Operating Supply Voltage: 3.3 V
• Power Supply Type: Digital
• Typical Supply Current: 10 mA
• Minimum Operating Supply Voltage: 3 V
• Maximum Operating Supply Voltage: 3.6 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1167 - BOARD EVAL SI2401 UART INTERFACE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 336-1095

Table 19 defines the relationship between SE5, SE6, and SE8.
6.2. Call Progress Filters
The programmable call progress filter coefficients are located in DSP address locations 0x0010 through 0x0023.
There are two independent 4th order filters, A and B, each consisting of two biquads, for a total of 20 coefficients.
Coefficients are 14 bits (–8192 to 8191) and are interpreted as, for example, b0 = value/4096, thus giving a floating
point value of approximately –2.0 to 2.0. Output of each biquad is calculated as follows:
The output of the filters is input to an energy detector and then compared to a fixed threshold with hysteresis (DSP
register CPDL). Defaults shown are a bandpass filter from 290–630 Hz (–3 dB). These registers are located in the
DSP and, thus, must be written in the same manner described in “DSP Registers”.
The filters may be configured in either parallel or cascade through SE6[6] (CPCD) with SE8 = 0x02, and the output
of filter B may be squared by selecting SE6[7] (CPSQ) = 1. Figure 5 shows a block diagram of the call progress
filter structure.
0x00
0x01
0x02
0x02
SE8
R/W
W
W
W
R
DADH
Name
DSP3
DDH
DSP register address bits [15:8]
DSP register data bits [15:8]
7 = Enable squaring function
6 = Call progress cascade disable
5 = Reserved
4 = User tone 3 and 4 reporting
3 = User tone 1 and 2 reporting
2 = V.23 tone reporting
1 = Answer tone reporting
0 = DTMF tone reporting
Table 19. SE5, SE6, and SE8 Relationship
DSP Register
w n [ ]
y n [ ]
Address
0x0010
0x0011
0x0012
0x0013
0x0014
0x0015
Table 20. Call Progress Filters
SE6
=
=
Description
w n [ ]
k0 x n [ ]
×
+
b1 w n 1
+
×
Coefficient
a1 w n 1
Rev. 1.0
A1_k0
A1_b1
A1_b2
A1_a1
A1_a2
A2_k0
[
×
–
[
]
+
–
b2 w n 2
]
+
×
Default (dec)
a2 w n 2
[
Name
DADL
DSP1
DSP2
×
DDL
–8184
–3801
4096
7737
1236
256
–
[
]
–
]
DSP register address bits [7:0]
DSP register data bits [7:0]
7 = DSP data available
6 = Tone detected
5 = Reserved
4:0 = Tone type
7 = Reserved
6:3 = DTMF tone to transmit
2:0 = Tone type
SE5
Description
Si2401
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