LM1815M/NOPB National Semiconductor, LM1815M/NOPB Datasheet - Page 9
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LM1815M/NOPB
Manufacturer Part Number
LM1815M/NOPB
Description
IC ADAPTIVE SENSE AMP 14SOIC
Manufacturer
National Semiconductor
Type
Sensor Interfacer
Specifications of LM1815M/NOPB
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Mounting Type
Surface Mount
Current - Supply
6mA
Output Type
Logic
Input Type
Logic
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Interface
-
Other names
*LM1815M::*LM1815M/NOPB::LM1815M
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Quantity
Price
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Application Hints
INPUT VOLTAGE CLAMP
The signal input voltage at pin 3 is internally clamped. Cur-
rent limit for the Input pin is provided by an external resistor
which should be selected to allow a peak current of
normal operation. Positive inputs are clamped by a 1kΩ
resistor and series diode (see R4 and Q12 in the internal
schematic diagram), while an active clamp limits pin 3 to
typically 350mV below Ground for negative inputs (see R2,
R3, Q10, and Q11 in the internal schematic diagram). Thus
for input signal transitions that are more than 350mV below
Ground, the input pin current (up to 3mA) will be pulled from
the V+ supply. If the V+ pin is not adequately bypassed the
resulting voltage ripple at the V+ pin will disrupt normal
device operation. Likewise, for input signal transitions that
are more than 500mV above Ground, the input pin current
will be dumped to Ground through device pin 2. Slight shifts
in the Ground potential at device pin 2, due to poor ground-
ing techniques relative to the input signal ground, can cause
unreliable operation. As always, adequate device grounding,
and V+ bypassing, needs to be considered across the entire
input voltage and frequency range for the intended applica-
tion.
INPUT CURRENT LIMITING
As stated earlier, current limiting for the Input pin is provided
by a user supplied external resistor. For purposes of select-
ing the appropriate resistor value the Input pin should be
considered to be a zero ohm connection to ground. For
applications where the input voltage signal is not symmetri-
cal with relationship to Ground the worst case voltage peak
should be used.
Minimum Rext = [(Vin peak)/3mA]
In the application example shown in figure 1 (Rext = 18kΩ)
the recommended maximum input signal voltage is
(i.e. 108Vp-p).
OPERATION OF ZERO CROSSING DETECTOR
The LM1815 is designed to operate as a zero crossing
detector, triggering an internal one shot on the negative-
going edge of the input signal. Unlike other zero crossing
FIGURE 2. LM1815 Oscillograms
±
3 mA in
±
54V
8
detectors, the LM1815 cannot be triggered until the input
signal has crossed an "arming" threshold on the positive-
going portion of the waveform. The arming circuit is reset
when the chip is triggered, and subsequent zero crossings
are ignored until the arming threshold is exceeded again.
This threshold varies depending on the connection at pin 5.
Three different modes of operation are possible:
MODE 1, PIN 5 OPEN
The adaptive mode is selected by leaving device pin 5 open
circuit. For input signals of less than
mVp-p) and greater than typically
the input arming threshold is typically at 45mV. Under these
conditions the input signal must first cross the 45mV thresh-
old in the positive direction to arm the zero crossing detector,
and then cross zero in the negative direction to trigger it.
If the signal is less than 30mV peak (minimum rating in
Electrical Characteristics), the one shot is guaranteed to not
trigger.
Input signals of greater than
cause the arming threshold to track at 80% of the peak input
voltage. A peak detector capacitor at device pin 7 stores a
value relative to the positive input peaks to establish the
arming threshold. Input signals must exceed this threshold in
the positive direction to arm the zero crossing detector,
which can then be triggered by a negative-going zero cross-
ing.
The peak detector tracks rapidly as the input signal ampli-
tude increases, and decays by virtue of the resistor con-
nected externally at pin 7 track decreases in the input signal.
If the input signal amplitude falls faster than the voltage
stored on the peak detector capacitor there may be a loss of
output signal until the capacitor voltage has decayed to an
appropriate level.
Note that since the input voltage is clamped, the waveform
observed at pin 3 is not identical to the waveform observed
at the variable reluctance sensor. Similarly, the voltage
stored at pin 7 is not identical to the peak voltage appearing
at pin 3.
00789303
±
230mV (i.e. 460 mVp-p) will
±
75mV (i.e. 150mVp-p),
±
135mV (i.e. 270