MT46H8M16LFBF-6 IT:KTR Micron Technology Inc, MT46H8M16LFBF-6 IT:KTR Datasheet - Page 71
![no-image](/images/manufacturer_photos/0/4/441/micron_technology_inc_sml.jpg)
MT46H8M16LFBF-6 IT:KTR
Manufacturer Part Number
MT46H8M16LFBF-6 IT:KTR
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet
1.MT46H8M16LFBF-6_ITKTR.pdf
(94 pages)
Specifications of MT46H8M16LFBF-6 IT:KTR
Organization
8Mx16
Density
128Mb
Address Bus
15b
Access Time (max)
6.5/5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
80mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
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Figure 33: Write – DM Operation
PDF: 09005aef8331b3e9
128mb_mobile_ddr_sdram_t35m.pdf - Rev. F 03/10 EN
Command
BA0, BA1
Address
DQS
DQ
CK#
CKE
A10
DM
CK
6
t
t
IS
IS
NOP
T0
t
1
t
IH
IH
Notes:
t
t
ACTIVE
IS
Bank x
IS
Row
Row
T1
t
t
IH
IH
1. NOP commands are shown for ease of illustration; other commands may be valid at
2. BL = 4 in the case shown.
3. PRE = PRECHARGE.
4. Disable auto precharge.
5. Bank x at T8 is “Don’t Care” if A10 is HIGH at T8.
6. D
t
CK
these times.
t
t
IN
RCD
RAS
n = data-in from column n.
NOP
T2
1
t
CH
t
CL
t
WPRES
t
WRITE
IS
Bank x
Note 4
Col n
T3
t
IH
t
2
DQSS (NOM)
t
71
DS
NOP
T4
D
128Mb: x16, x32 Mobile LPDDR SDRAM
IN
t
WPRE
1
t
DH
T4n
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
DQSL
NOP
D
T5
IN
t
DQSH
1
T5n
t
WPST
NOP
T6
1
Don’t Care
© 2007 Micron Technology, Inc. All rights reserved.
WRITE Operation
t
NOP
WR
T7
1
1
Transitioning Data
One bank
All banks
Bank x
PRE
T8
3
5
t
RP
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