ADM1022ARQ-REEL ON Semiconductor, ADM1022ARQ-REEL Datasheet - Page 17

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ADM1022ARQ-REEL

Manufacturer Part Number
ADM1022ARQ-REEL
Description
IC SENSOR TEMP/DET 3/5.5V 16QSOP
Manufacturer
ON Semiconductor
Type
Temperature Sensorr
Datasheet

Specifications of ADM1022ARQ-REEL

Rohs Status
RoHS non-compliant
Input Type
Logic
Output Type
Analog
Interface
Serial
Current - Supply
2.6mA
Mounting Type
Surface Mount
Package / Case
16-QSOP

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Bit
0
1
2
3
4
5
6
7
Bit
0
1
2
3
4
5
6
7
NOTE: An error that causes continuous interrupts to be generated may be masked in its respective mask register until the error can be alleviated.
Name
Int. Temp Error
Ext. Temp2 Error
Diode 2 Fault
Reserved
GPI Input
Ext. Temp1 Error
THERM Input
Diode 1 Fault
Name
START
INT Enable
INT Clear
Programmable
Automatic Trip
Point Lock Bit
Soft Reset
FAN OFF
GPI Invert
D2
Table VII. Register 0x41 Interrupt Status Register. Power-On Default <7:0> = 00h
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Once
Read/Write
Read/Write
Read/Write
Read/Write
Read Only
Read Only
Read Only
Read Only
Read Only
Read/Write
Read Only
Read Only
Read Only
Table VI. Register 0x40 Configuration Register
Setting this bit to a “1” enables the INT output. 1 = Enabled 0 = Disabled
Setting this bit to a “1” will restore power-up default values to the Configuration Regis-
Setting this bit to a “1” will cause the FAN OFF pin to be floated. Clearing this bit to “0”
Setting this bit configures Pins 11 and 12 as inputs for a second diode temperature sen-
Description
Setting this bit to a “1” enables startup of ADM1022; clearing this bit to a “0” places
ADM1022 in standby mode. Caution: The INT output will not be cleared if the user
clears this bit after an interrupt has occurred (see “INT Clear” bit). At startup tempera-
ture monitoring and limit checking functions begin. Note, all limit values should be pro-
grammed into ADM1022 prior to using the standard thermal interrupt mechanism based
upon high and low limits. (Power-Up Default = 1.)
(Power-Up Default = 0).
This bit clears the INT output when set (1) without affecting the contents of the Interrupt
Status Register. (Power-Up Default = 1.)
Setting this bit to a “1” will lock in the value set into the Programmable Local and Remote
Automatic Trip Point Registers (Value Register locations 0x13 and 0x14). Furthermore,
when this bit is set, the values in the Default Local and Remote Automatic Trip Point
Registers (Value Register locations 0x17 and 0x18) will no longer have an effect on the
THERM, FAN_SPD or FAN-OFF outputs. This bit cannot be written again until after
RST2 has been asserted or Power-On Reset occurs. (Power-Up Default = 0.)
ter, Interrupt Status Register, Interrupt Status Register Mirror, Interrupt Mask Register.
This bit automatically clears itself since the power-on default is zero.
will cause the FAN OFF pin to be driven low, which requests that the fan be turned off.
This bit will be unconditionally set if the THERM pin is ever asserted. Reading this bit
reflects the state of the FAN-OFF output buffer. Due to the open-drain nature of this pin
the value read does not represent the actual state of the external circuit connected to it.
(Power-Up Default = 1.)
Setting this bit to a “1” will invert the GPI input for the purpose of level detection and
interrupt generation. Clearing this bit to a “0” leaves the GPI input unmodified. (Power-
Up Default = 0.)
sor. Clearing this bit configures Pin 11 as THERM output and Pin 12 as general purpose
logic input (GPI). (Power-Up Default = 0.)
Description
A one indicates that one of the internal temperature sensor limits has been exceeded.
A one indicates that one of the limits for the second external temperature sensor has
A one indicates that one of the limits for the first external temperature sensor has been
A one indicates that the thermal overload (THERM) line has been asserted externally.
A one indicates either a short- or open-circuit fault on remote sensor diode 1.
been exceeded.
A one indicates either a short- or open-circuit fault on remote sensor diode 2.
Undefined.
A “1” indicates that the GPI pin is asserted. The polarity of the GPI pin is determined
by GPI Invert (Bit 6) in the Configuration Register. For example, if GPI Invert is cleared,
this bit will be “1” when the GPI pin is high (“1”); this bit will be “0” when the GPI
pin is low (“0”). If GPI Invert is set, this bit will be “1” when the GPI pin is low (“0”);
this bit will be “0” when the GPI pin is high (“1”). Note that the state of GPI is not
latched; this bit simply reflects the state or inverted state of the GPI pin. Note: if this
bit is “1” reading this register will NOT clear it to “0.”
exceeded.
ADM1022

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