DS99R106SQX/NOPB National Semiconductor, DS99R106SQX/NOPB Datasheet - Page 3
![IC DESERIALIZ 40MHZ 24BIT 48LLP](/photos/6/92/69244/pkg_sqa48d_sml.jpg)
DS99R106SQX/NOPB
Manufacturer Part Number
DS99R106SQX/NOPB
Description
IC DESERIALIZ 40MHZ 24BIT 48LLP
Manufacturer
National Semiconductor
Datasheet
1.DS99R106SQNOPB.pdf
(24 pages)
Specifications of DS99R106SQX/NOPB
Function
Deserializer
Data Rate
960Mbps
Input Type
LVTTL/LVCMOS
Output Type
LVDS
Number Of Inputs
1
Number Of Outputs
24
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-LLP
Number Of Elements
1
Number Of Receivers
1
Number Of Drivers
24
Operating Supply Voltage (typ)
3.3V
Differential Input High Threshold Voltage
50mV
Diff. Input Low Threshold Volt
-50mV
Transmission Data Rate
960Mbps
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DS99R106SQX
LVDS DC SPECIFICATIONS
V
V
I
R
V
ΔV
V
ΔV
I
I
SER/DES SUPPLY CURRENT (DVDD*, PVDD* and AVDD* pins) *Digital, PLL, and Analog VDDs
I
I
Symbol
IN
OS
OZ
DDT
DDTZ
TH
TL
OD
OS
T
OD
OS
Differential Threshold High
Voltage
Differential Threshold Low
Voltage
Input Current
Differential Internal
Termination Resistance
Output Differential Voltage
(D
Output Differential Voltage
Unbalance
Offset Voltage
Offset Voltage Unbalance
Output Short Circuit Current
TRI-STATE Output Current
Serializer (Tx)
Total Supply Current
(includes load current)
Serializer (Tx)
Total Supply Current
(includes load current)
Serializer (Tx)
Supply Current Power-down
OUT+
)–(D
Parameter
OUT−
)
V
V
V
V
R
VODSEL = L (Figure 10)
R
VODSEL = H (Figure 10)
R
R
R
DOUT = 0V, DIN = H,
TPWDNB, DEN = 2.4V,
VODSEL = L
DOUT = 0V, DIN = H,
TPWDNB, DEN = 2.4V,
VODSEL = H
TPWDNB, DEN = 0V,
DOUT = 0V or 2.4V
R
Pre-emphasis = OFF
VODSEL = L
Checker-board pattern (Figure 1)
R
Pre-emphasis = ON
VODSEL = L
Checker-board pattern (Figure 1)
R
Pre-emphasis = OFF
VODSEL = H
Checker-board pattern (Figure 1)
R
Pre-emphasis = ON
VODSEL = H
Checker-board pattern (Figure 1)
TPWDNB = 0V
(All other LVCMOS Inputs = 0V)
CM
IN
DD
IN
L
L
L
L
L
L
L
L
L
= 100Ω, w/o Pre-emphasis
= 100Ω, w/o Pre-emphasis
= 100Ω, w/o Pre-emphasis
= 100Ω, w/o Pre-emphasis
= 100Ω, w/o Pre-emphasis
= 100Ω
= 100Ω
= 100Ω
= 100Ω
= +2.4V,
= 0V, V
= 3.6V
= +1.2V
DD
Conditions
= 3.6V
3
Rx: R
Tx: D
f = 40 MHz
f = 40 MHz
f = 40 MHz
f = 40 MHz
OUT+
IN+
Pin/Freq.
, R
, D
IN−
OUT−
1.00 1.25
Min
−50
250
450
−15
90
−2
−7
Typ
100
400
750
−10
−5
±1
40
45
40
45
4
1
1
www.national.com
±300
±300
1200
Max
1.50
+50
130
600
−13
+15
100
50
50
−8
80
85
85
90
Units
mV
mV
mV
mV
mV
mV
mA
mA
mA
mA
mA
mA
µA
µA
µA
µA
Ω
V