DS2176 Maxim Integrated Products, DS2176 Datasheet - Page 5

IC BUFFER RECEIVE T1 24-DIP

DS2176

Manufacturer Part Number
DS2176
Description
IC BUFFER RECEIVE T1 24-DIP
Manufacturer
Maxim Integrated Products
Type
Bufferr
Datasheet

Specifications of DS2176

Tx/rx Type
T1
Delay Time
100ns
Capacitance - Input
5pF
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
10mA
Mounting Type
Through Hole
Package / Case
24-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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DS2176
passed through the receive buffer and presented at SSER immediately after the rising edge of the system
side frame sync. The F–bit is dropped in 2.048 MHz applications and the MSB of channel 1 appears at
SSER one bit period after a rising edge at SFSYNC. SSER is forced to 1 in all channels greater than 24.
See Figures 3 and 4.
In 2.048 MHz applications (SCLKSEL=1), the PCM buffer control logic establishes slip criteria different
from that used in 1.544 MHz applications to compensate for the faster system-side read frequency.
PARALLEL COMPATIBILITY
The DS2176 is compatible with parallel and serial back-planes. Channel 1 data appears at SSER after a
rising edge at SFSYNC as shown in Figures 3 and 4 (serial applications, S/
=1). The device utilizes a
P
look–ahead circuit in parallel applications (S/
=0). Data is output 8 clocks earlier, allowing the user to
P
convert parallel data eternally.
SYSTEM MULTIFRAME BOUNDARY TIMING (SYSCLK = 1.544 MHz) Figure 3
5 of 15

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