LTC1756EGN Linear Technology, LTC1756EGN Datasheet - Page 9

• Manufacturer Part Number: LTC1756EGN
• Description: IC SMART CARD 16-SSOP
• Manufacturer: Linear Technology

Specifications of LTC1756EGN

• Applications: Smart Card
• Voltage - Supply: 2.7 V ~ 6 V
• Package / Case: 16-SSOP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Interface: -
• Other names: Q1274157

PI FU CTIO S
The READY pin is configured as an open-drain pull-down
with a weak pull-up current source. This permits wired-
OR connections of multiple LTC1755/LTC1756s to a
single microcontroller.
ALARM (Pin 22, LTC1755 Only): (Output) A low on this
pin indicates that a fault has occurred and that the LTC1755
is in the Alarm state (see the State Diagram). Possible
faults include V
perature shutdown, CLK or RST invalid output levels, and
card removal during the Active state.
CLK or RST invalid and overtemperature faults are de-
tected only after V
indicated by the READY pin). V
removal during Active faults are detected at any time
during the Active period (i.e., once PWR = 0V).
The ALARM pin is configured as an open-drain pull-down
with a weak pull-up current source. This permits wired-
OR connections of multiple LTC1755s to a single micro-
controller.
U
U
CC
underrange for at least 5 s, overtem-
U
CC
has reached its final value (as
LTC1755/LTC1756
CC
underrange and card
CARD (Pin 23/15): (Output) Level-Shifted and Debounced
PRES Signal from the Smart Card Acceptor Switch. When
a valid card indication appears, this pin communicates the
presence of the Smart Card to the microcontroller. The
CARD pin has an open-drain active pull-down with a weak
pull-up current source for logic-OR connections. The
debounce circuit ensures that a card has been present for
a continuous period of at least 40ms before asserting
CARD low. The CARD pin returns high within 50 s of card
removal. The PRES pin, in conjunction with the NC/NO pin,
determines if a card is present.
5V/3V (Pin 24/16): (Input) Controls the output voltage
(V
valid high sets V
5V/3V pin is latched on the falling edge of the PWR pin.
When PWR is low, changes on the 5V/3V pin are ignored.
To change the voltage on V
first be returned to the Idle state by bringing the PWR pin
high.
DV
CC
CC
) of the DC/DC converter during the Active state. A
sets the logic reference level for the 5V/3V pin.
CC
to 5V. A valid low sets V
LTC1755/LTC1756
CC
the LTC1755/LTC1756 must
CC
to 3V. The
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