W83627EHG Nuvoton Technology Corporation of America, W83627EHG Datasheet - Page 202

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W83627EHG

Manufacturer Part Number
W83627EHG
Description
IC I/O CONTROLLER 128-QFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheets

Specifications of W83627EHG

Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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15. VID INPUTS AND OUTPUTS
The W83627EHF/EHG/EF/EG provides eight pins for VID input or output function. The default function
is VID input. These pins can be configured to VID output function by setting Logical Device B, CR[F0h],
bit 7 to 0. The configuration is applied to the 8 pins as a group. None of them can be individually set to
input or output.
The W83627EHF/EHG/EF/EG supports Intel VRM 9/10/11 and AMD VRM VID detections. H/W
strapping and S/W programming can set the following three input levels. a) and b) can be set by H/W
strapping or S/W programming, while c) can only be set by S/W programming.
a) TTL (Vih = 2 V; Vil = 0.8V) –
b) GTL (Vih = 0.6 V; Vil = 0.4 V) – (Default)
c) AMD VRM (Vih = 1.4V; Vil = 0.8V) –
The input data can be read in the data register at Logical Device B, CR[F1h], bit 7 ~ 0. It is a read/write
register where bit 7~0 corresponds to VID pin 7~0. Please note that in the input mode, writes to this
register have no effect.
15.1 VID Input Detection
15.2 VID Output Control
1) Add a pulled-down resistor at Pin 77(EN_GTL), or
2) Set Configuration Register CR[2Ch], bit 3 to “0”;
Set Configuration Register CR[2Ch], bit 3 to “1” and Logical Device B, CR[F0h], but 6 to “1”.
1) No extra pulled-up resistor needed, or
2) Set Configuration Register CR[2Ch], bit 3 to “1”;
W83627EHF/EF, W83627EHG/EG
-191-
Publication Release Date: April 7, 2009
Version 1.94

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