W83697HG Nuvoton Technology Corporation of America, W83697HG Datasheet - Page 81

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W83697HG

Manufacturer Part Number
W83697HG
Description
IC LPC SUPER I/O 128-PQFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83697HG

Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V, 5V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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7.11 Logical Device 8 (MIDI Port and GPIO Port 5)
CR30 (MIDI Port Default 0x00)
CR60, CR 61 (Default 0x03, 0x30 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR62, CR 63 (Default 0x00, 0x00 )
CR70 (Default 0x09 if PNPCSV = 0 during POR, default 0x00 otherwise)
CRF0 (GP5 selection register. Default 0xFF)
CRF1 (GP5 data register. Default 0x00)
CRF2 (GP5 inversion register. Default 0x00)
When set to a '1', the incoming/outgoing port value is inverted.
When set to a '0', the incoming/outgoing port value is the same as in data register.
When set to a '1', respective GPIO port is programmed as an input port.
When set to a '0', respective GPIO port is programmed as an output port.
If a port is programmed to be an output port, then its respective bit can be read/written.
If a port is programmed to be an input port, then its respective bit can only be read.
Bit 7 - 1: Reserved.
Bit 0: = 1 MIDI/GP5 port is Activate
These two registers select the MIDI Port base address [0x100:0xFFF] on 2byte boundary.
These two registers select the GPIO5 base address [0x100:0xFFF] on 4byte boundary.
IO address :
IO address + 1 : CRF3 base address
IO address + 2 : CRF4 base address
IO address + 3 : CRF5 base address
Bit 7 - 4: Reserved.
Bit [3:0]: These bits select IRQ resource for MIDI Port .
= 0 MIDI/GP5 port is inactive.
CRF1 base address
- 78 -
W83697HF/ HG

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