Z86M1720ASG Zilog, Z86M1720ASG Datasheet - Page 36
Z86M1720ASG
Manufacturer Part Number
Z86M1720ASG
Description
IC PCMCIA INTERFACE 100-VQFP
Manufacturer
Zilog
Datasheet
1.Z86M1720ASG.pdf
(138 pages)
Specifications of Z86M1720ASG
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
*
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PS012002-1201
Z86017/Z16017 PCMCIA Interface Solution
Product Specification
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ATA_HIOR (Output, 8 mA)
ATA/IDE Mode: ATA Host I/O Read Strobe.
Peripheral Mode: I/O read strobe or memory read strobe, depending
on configuration.
ATA_HIOW (Output, 8 mA)
ATA/IDE Mode: ATA Host I/O Write Strobe.
Peripheral Mode: I/O Write Strobe or Memory Write Strobe,
depending on configuration.
ATA_IOCS16 (Input, 100K Pull-Up)
ATA/IDE Mode: I/O channel is 16 bits wide; input on the local ATA
bus.
Peripheral Mode: I/O access is 16 bits wide.
ATA_IREQ (Input)
ATA/IDE Mode: ATA/IDE host Interrupt Request.
Peripheral Mode: Interrupt Request.
ATA_IOCHRDY (Input, 100K Pull-Up)
ATA/IDE Mode: ATA/IDE I/O Channel Ready-Input.
Peripheral Mode: I/O Channel Ready.
ATA_HRESET (Output, 8 mA)
ATA/IDE Mode: ATA Host Reset-Output to the ATA/IDE controller
(programmable).
Peripheral Mode: Host reset output to the peripheral device if
PCMCIA signal is active (programmable).
ATA_DREQ/BVD1 (Input)
ATA/IDE Mode: ATA/IDE DMA request from the ATA/IDE
controller.
Peripheral Mode: Peripheral bus DMA Request or when in memory
mode Battery Voltage 1 Detect input.
ATA_DACK/BVD2 (I/O, 8 mA)
ATA/IDE Mode: ATA/IDE host DMA Acknowledge.
Peripheral Mode: Peripheral Bus DMA Acknowledge. DMA
PCMCIA Interface Overview
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