USB3500-ABZJ SMSC, USB3500-ABZJ Datasheet - Page 12

• Manufacturer Part Number: USB3500-ABZJ
• Description: IC USB HOST/OTG PHY W/UTMI 56QFN
• Manufacturer: SMSC

Specifications of USB3500-ABZJ

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: *
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1035

Revision 1.0 (06-05-08)
PIN
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
LINESTATE[1]
LINESTATE[0]
XCVRSEL[1]
CHRGVBUS
OPMODE[1]
OPMODE[0]
RXACTIVE
IDPULLUP
CLKOUT
VDD3.3
VDD1.8
ID_DIG
NAME
VSS
VSS
VSS
DM
Table 3.1 USB3500 Pin Definitions (continued)
DIRECTION,
Ground
Ground
Ground
Output,
Analog
Output
Output
CMOS
Output
Output
TYPE
Input
Input
Input
Input
Input
I/O,
N/A
N/A
DATASHEET
ACTIVE
LEVEL
High
High
High
High
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
12
Hi-Speed USB Host, Device or OTG PHY With UTMI+ Interface
DESCRIPTION
D- pin of the USB cable.
PHY ground.
3.3V PHY Supply.
Transceiver Select. These signals select between
the FS and HS transceivers:
Transceiver select.
00: HS
01: FS
10: LS
11: LS data, FS rise/fall times
Charge VBUS through a resistor to VDD3.3.
0: do not charge VBUS
1: charge VBUS
Receive Active. Indicates that the receive state
machine has detected Start of Packet and is active.
Operational Mode. These signals select between
the various operational modes:
[1]
0
0
1
1
ID Digital. Indicates the state of the ID pin.
0: connected plug is a mini-A
1: connected plug is a mini-B
ID Pull-up. Enables sampling of the analog ID line.
Disabling the ID line sampler will reduce PHY power
consumption.
0: Disable sampling of ID line.
1: Enable sampling of ID line.
PHY ground.
60MHz reference clock output. All UTMI+ signals are
driven synchronous to this clock.
PHY ground.
Line State. These signals reflect the current state of
the USB data bus in FS mode. Bit [0] reflects the
state of DP and bit [1] reflects the state of DM. When
the device is suspended or resuming from a
suspended state, the signals are combinatorial.
Otherwise, the signals are synchronized to CLKOUT.
[1]
0
0
1
1
1.8V regulator output for digital circuitry on chip.
Place a 0.1uF capacitor near this pin and connect
the capacitor from this pin to ground. Connect pin 27
to pin 49.
0
[0]
1
[0]
0
1
0
1
0
1
2: Disable bit stuffing and NRZI encoding
Description
Description
1: Non-driving (all terminations removed)
0: Normal Operation
3: Reserved
0: SEO
1: J State
2: K State
3: SE1
SMSC USB3500
Datasheet