N25Q128A11BSF40F Numonyx - A DIVISION OF MICRON SEMICONDUCTOR PRODUCTS, INC., N25Q128A11BSF40F Datasheet - Page 23
N25Q128A11BSF40F
Manufacturer Part Number
N25Q128A11BSF40F
Description
IC SRL FLASH 128MB NMX 16-SOIC
Manufacturer
Numonyx - A DIVISION OF MICRON SEMICONDUCTOR PRODUCTS, INC.
Series
Forté™r
Datasheet
1.N25Q128A11B1241F.pdf
(185 pages)
Specifications of N25Q128A11BSF40F
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
128M (16M x 8)
Speed
108MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.7 V ~ 2 V
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.295", 7.50mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
N25Q128A11BSF40F
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
N25Q128A11BSF40F
Manufacturer:
MICRON
Quantity:
1 200
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5
5.1
5.1.1
Note:
5.1.2
5.1.3
5.1.4
Operating features
Extended SPI Protocol Operating features
Read Operations
To read the memory content in Extended SPI protocol different instructions are available:
READ, Fast Read, Dual Output Fast Read, Dual Input Output Fast Read, Quad Output Fast
Read and Quad Input Output Fast read, allowing the application to choose an instruction to
send addresses and receive data by one, two or four data lines.
In the Extended SPI protocol the instruction code is always sent on one data line (DQ0): to
use two or four data lines the user must use either the DIO-SPI or the QIO-SPI protocol
respectively.
For fast read instructions the number of dummy clock cycles is configurable by using VCR
bits [7:4] or NVCR bits [15:12].
After a successful reading instruction a reduced tSHSL equal to 20 ns is allowed to further
improve random access time (in all the other cases tSHSL should be at least 50 ns). See
Table 33.: AC
Page programming
To program one data byte, two instructions are required: write enable (WREN), which is one
byte, and a page program (PP) sequence, which consists of four bytes plus data. This is
followed by the internal program cycle (of duration t
To spread this overhead, the page program (PP) instruction allows up to 256 bytes to be
programmed at a time (changing bits from ‘1’ to ‘0’), provided that they lie in consecutive
addresses on the same page of memory.
For optimized timings, it is recommended to use the page program (PP) instruction to
program all consecutive targeted bytes in a single sequence versus using several page
program (PP) sequences with each containing only a few bytes (see
programming
Dual input fast program
The dual input fast program (DIFP) instruction makes it possible to program up to 256 bytes
using two input pins at the same time (by changing bits from ‘1’ to ‘0’).
For optimized timings, it is recommended to use the DIFP instruction to program all
consecutive targeted bytes in a single sequence rather using several DIFP sequences each
containing only a few bytes (see
Dual Input Extended Fast Program
The Dual Input Extended Fast Program (DIEFP) instruction is an enhanced version of the
Dual Input Fast Program instruction, allowing to transmit address across two data lines.
For optimized timings, it is recommended to use the DIEFP instruction to program all
consecutive targeted bytes in a single sequence rather than using several DIEFP
sequences, each containing only a few bytes.
and
Characteristics.
Table 33: AC
Characteristics).
Section 9.1.12: Dual Input Fast Program
PP
).
Section 5.2.3: Page
(DIFP)).
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