PC28F128J3D75D Numonyx - A DIVISION OF MICRON SEMICONDUCTOR PRODUCTS, INC., PC28F128J3D75D Datasheet - Page 45

• Manufacturer Part Number: PC28F128J3D75D
• Description: IC FLASH 128MBIT 75NS 64EZBGA
• Manufacturer: Numonyx - A DIVISION OF MICRON SEMICONDUCTOR PRODUCTS, INC.
• Series: -r

Specifications of PC28F128J3D75D

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 128M (16Mx8, 8Mx16)
• Speed: 75ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 872831; 872831TR; 872831TR; PC28F128J3D75 S L8QU; PC28F128J3D75D; PC28F128J3D75DTR

Numonyx™ Embedded Flash Memory (J3 v D, Monolithic)
9.7.6
Figure 18: Protection Register Memory Map
Note:
Table 29: Word-Wide Protection Register Addressing
December 2007
316577-06
Note:
LOCK
Word
A0 is not used in x16 mode when accessing the protection register map. See
A0 is used, see
0
1
2
3
4
5
6
7
All address lines not specified in the above table must be 0 when accessing the Protection Register (i.e., A[MAX:9] = 0.)
Locking the OTP Protection Register
The user-programmable segment of the PR is lockable by programming Bit 1 of the
Protection Lock Register (PLR) to 0. Bit 0 of this location is programmed to 0 at the
Numonyx factory to protect the unique device number. Bit 1 is set using the Protection
Program command to program “0xFFFD” to the PLR. After these bits have been
programmed, no further changes can be made to the values stored in the Protection
Register. Protection Program commands to a locked section will result in a Status
Register error (SR.4 and SR.1 will be set). The PR lockout state is not reversible.
Table 30
Factory
Factory
Factory
Factory
Both
User
User
User
User
Use
Address
Word
for x8 addressing.
0x88
0x85
0x84
0x81
0x80
A8
1
1
1
1
1
1
1
1
1
15 14 13 12 11 10 9
128-Bit Protection Register 0
A[24:1]: 256 Mbit
A[23:1]: 128 Mbit
(Factory-Programmed)
(User-Programmable)
A7
0
0
0
0
0
0
0
0
0
64-bit Segment
64-bit Segment
Lock Register 0
8
7
A6
0
0
0
0
0
0
0
0
0
6
5
4
3
A[22:1]: 64 Mbit
A[21:1]: 32 Mbit
A5
2
0
0
0
0
0
0
0
0
0
1
0
Table 29
A4
0
0
0
0
0
0
0
0
1
for x16 addressing. In x8 mode
A3
0
0
0
0
1
1
1
1
0
A2
0
0
1
1
0
0
1
1
0
Datasheet
A1
0
1
0
1
0
1
0
1
0
45