STEF12PUR STMicroelectronics, STEF12PUR Datasheet - Page 8

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STEF12PUR

Manufacturer Part Number
STEF12PUR
Description
IC LINEAR VOLTAGE REG 10VDFPN
Manufacturer
STMicroelectronics
Datasheet

Specifications of STEF12PUR

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11266-2

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Typical Application
4.3
4.4
8/17
C dv/dt calculation
Connecting a capacitor between the C
output voltage ramp up time.
Given the desired time interval t during which the output voltage goes from zero to his
maximum value, the capacitance to be added on C
following theroetical formula:
Where C
The addition of an external C
between the Enable signal going high and the start of the V
The contribution of the external capacitor to this time interval can be extimated by using the
following theoretical formula:
Enable-fault pin
The Enable/Fault pin has the dual function of controlling the output of the device and, at the
same time , of providing information about the device status to the application.
When it is used as a standard Enable pin, it should be connected to an external open-drain
or open-collector device. In this case, when it is pulled at low logic level, it will turn the output
of the E-Fuse off.
dv/dt
Figure 4.
is expressed in Farad and the time in seconds.
delay time
Delay time and V
dv/dt
C
Doc Number Rev 07
dvdt
=
influences also the initial delay time, defined as the time
=
350
24 10
dv/dt
10
pin and Gnd will allow the modification of the
OUT
6
9
+
t 30x10
ramp-up time
11.3 10
dv/dt
pin can be calculated using the
6
12
C
OUT
dvdt
slope
(Figure
4).
STEF12

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