SC4525DSETRT Semtech, SC4525DSETRT Datasheet - Page 15

• Manufacturer Part Number: SC4525DSETRT
• Description: IC BUCK ADJ 3A 8SOIC
• Manufacturer: Semtech
• Series: -r
• Type: Step-Down (Buck), PWM - Current Moder

Specifications of SC4525DSETRT

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 1 V ~ 16.74 V
• Current - Output: 3A
• Frequency - Switching: 65kHz ~ 350kHz
• Voltage - Input: 3 V ~ 18 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width) Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: SC4525DSETR

© 2011 Semtech Corp.
Applications Information (Cont.)
The temperature rise of the SC4525D is the product of the
total power dissipation (Equation (13)) and q
which is the thermal impedance from junction to ambient
for the SOIC-8 EDP package.
It is not recommended to operate the SC4525D above
125
PCB Layout Considerations
In a step-down switching regulator, the input bypass
capacitor, the main power switch and the freewheeling
diode carry pulse current (Figure 9). For jitter-free
operation, the size of the loop formed by these components
should be minimized. Since the power switch is already
integrated within the SC4525D, connecting the anode of
the freewheeling diode close to the negative terminal of
the input bypass capacitor minimizes size of the switched
current loop. The input bypass capacitor should be placed
close to the IN pin. Shortening the traces of the SW and
BST nodes reduces the parasitic trace inductance at these
nodes. This not only reduces EMI but also decreases
switching voltage spikes at these nodes.
The exposed pad should be soldered to a large ground
plane as the ground copper acts as a heat sink for the
device. To ensure proper adhesion to the ground plane,
avoid using vias directly under the device.
o
C junction temperature.
P
P
P
P
P
P
P
P
P
P
P
P
C
C
B S T
B S T
D
D
IND
IND
T OT AL
T OT AL
S W
S W
=
=
=
=
=
=
=
=
D
D
=
=
1 (
1 (
=
=
1
1
1 (
1 (
2
2
D
D
⋅
⋅
−
−
V
V
P
P
1 .
1 .
⋅
⋅
⋅
⋅
C E S AT
C E S AT
C
C
) D
) D
t
t
V
V
S
S
B S T
B S T
~
~
+
+
⋅
⋅
⋅
⋅
. 1
. 1
P
P
V
V
V
V
⋅
⋅
⋅
⋅
S W
S W
D
D
IN
IN
) 3
) 3
I
I
40
40
O
O
I
I
⋅
⋅
O
O
⋅
⋅
I
I
⋅
⋅
+
+
I
I
O
O
I
I
O
O
2
2
O
O
P
P
⋅
⋅
B S T
B S T
⋅
⋅
F
F
R
R
S W
S W
DC
DC
+
+
P
P
Q
Q
P
P
Q
Q
=
=
V
V
IN
IN
⋅
⋅
JA
2
2
mA
mA
(13)
(36
o
C/W),
Figure 9. Heavy lines indicate the critical pulse
V
V
IN
IN
current loop. Thes stray inductance of this
loop should be minimized.
Vin
Vin
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+
+
SC4525D
Z
Z
L
L
V
V
OUT
OUT
15
C
C
+
+