WD1SN256X808-400C-PN Wintec Industries, WD1SN256X808-400C-PN Datasheet - Page 6

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WD1SN256X808-400C-PN

Manufacturer Part Number
WD1SN256X808-400C-PN
Description
MODULE DDR-400 256MB 200-SODIMM
Manufacturer
Wintec Industries
Series
-r
Datasheet

Specifications of WD1SN256X808-400C-PN

Memory Type
DDR SDRAM
Memory Size
256MB
Speed
400MHz
Features
-
Package / Case
200-SODIMM
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
DQ output access time from
CK/
DQS output access time from
CK/
CK high-level width
CK low-level width
CK half period
Clock cycle time
Active to Precharge command
Active to Active command
period
Refresh to Refresh command
interval
Active to Read/Write delay
Precharge command period
DQ and DM input hold time
DQ and DM input setup time
Control & Address input pulse
width for each input
DQ and DM input pulse width
for each input
Data-out high-impedance time
from CK/
Data-out low-impedance time
from CK/
DQS-DQ skew for DQS and
associated DQ signals
Write command to 1
latching transition
Data hold skew factor
Data output hold time from
DQS
DQS input low/high pulse width tDQSL,H
DQS falling edge to CK setup
time
DQS falling edge hold time
from CK
Mode register set command
cycle time
Write postamble
Write preamble
Write preamble setup time
Electrical Characteristics and AC Timings:
V
Green Rev. 1.1 - March, 06
DD
CK
CK
= +2.5V ± 0.2V, V
Parameter
CK
CK
st
DQS
DD
Q = +2.5V ± 0.2V, V
tAC
tDQSCK
tCH
tCL
tHP
tCK3
tCK2.5
tCK2
tRAS
tRC
tRFC
tRCD
tRP
tDH
tDS
tIPW
tDIPW
tHZ
tLZ
tDQSQ
tDQSS
tQHS
tQH
tDSS
tDSH
tMRD
tWPST
tWPRE
tWPRES
Symbol
Wintec Industries, Inc., reserves the right to change datasheets and/or products without any notice.
(tCL,
Min. Max. Min. Max. Min.
tCH)
tQHS
0.45
0.45
1.75
0.72
0.35
0.25
-0.7
tHP-
0.40
-0.5
-0.6
min
-0.7
7.5
0.4
0.4
2.2
0.2
0.2
DDR-400
40
55
70
15
15
5
6
2
0
-
-
-5
SS
70,000
+0.5
+0.6
+0.7
+0.7
+0.4
+0.5
0.55
0.55
1.25
0.60
12
12
= 0V
8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
One Rank, x8 Non-ECC SODIMM Pb-free
(tCL,
tCH)
tQHS
0.45
0.45
0.45
0.45
1.75
0.75
0.35
0.40
0.25
-0.7
-0.6
-0.7
-0.7
tHP-
min
7.5
2.2
0.2
0.2
DDR-333
42
60
72
18
18
6
6
2
0
-
-
6
-6
70,000
+0.45
+0.55
+0.7
+0.6
0.55
0.55
+0.7
+0.7
1.25
0.60
12
12
12
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
DDR-266, 333, 400MHz, 64-bit
-0.75
-0.75
(tCL,
-0.75
-0.75
tCH)
tQHS
0.45
0.45
1.75
0.75
tHP-
0.35
0.40
0.25
min
7.5
0.5
0.5
2.2
0.2
0.2
45
60
75
15
15
DDR-266
7
7
2
0
-
-
-7
120,000
+0.75
+0.75
+0.75
+0.75
+0.75
Max.
0.55
0.55
+0.5
1.25
0.60
12
12
12
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-0.75
-0.75
(tCL,
-0.75
-0.75
Min.
tCH)
tQHS
0.45
0.45
1.75
0.75
0.35
0.40
0.25
tHP-
min
7.5
7.5
0.5
0.5
2.2
0.2
0.2
DDR-266B
45
65
75
20
20
7
2
0
-
-
-7.5
120,000
+0.75
+0.75
+0.75
+0.75
+0.75
Max.
 2006 Wintec Industries, Inc.
0.55
0.55
+0.8
0.60
1.25
12
12
12
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Unit
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1,2,3,4,11
1,2,3,4,10
1,2,3,4,6
1,2,3,4,6
1,2,3,4,7
1,2,3,4,7
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
1,2,3,4
Note

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