UJA1069TW24/3V0,51 NXP Semiconductors, UJA1069TW24/3V0,51 Datasheet - Page 57
UJA1069TW24/3V0,51
Manufacturer Part Number
UJA1069TW24/3V0,51
Description
IC LIN FAIL-SAFE 24-HTSSOP
Manufacturer
NXP Semiconductors
Datasheet
1.UJA1069TW243V051.pdf
(64 pages)
Specifications of UJA1069TW24/3V0,51
Applications
Automotive
Interface
LIN (Local Interconnect Network)
Voltage - Supply
3V
Package / Case
24-TSSOP Exposed Pad, 24-eTSSOP, 24-HTSSOP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935280016518
UJA1069TW24/3V0-T
UJA1069TW24/3V0-T
UJA1069TW24/3V0-T
UJA1069TW24/3V0-T
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11. Test information
UJA1069_3
Product data sheet
Fig 25. Timing test circuit for LIN transceiver
Fig 26. Timing diagram LIN transceiver
receiving
receiving
LIN BUS
V
node 1
node 2
V
BAT42
signal
TXDL
11.1 Quality information
V
V
RXDL1
RXDL2
Immunity against automotive transients (malfunction and damage) in accordance with LIN
EMC Test Specification / Version 1.0; August 1, 2004.
This product has been qualified to the appropriate Automotive Electronics Council (AEC)
standard Q100 or Q101 and is suitable for use in automotive critical applications.
t
bit
t
p(rx)f
t
t
bus(dom)(max)
bus(dom)(min)
20 pF
Rev. 03 — 10 September 2007
RXDL
TXDL
t
t
bit
p(rx)r
t
p(rx)r
BAT42
SBC
GND
t
t
bus(rec)(min)
bus(rec)(max)
RTLIN
LIN
t
bit
t
p(rx)f
001aad179
R1
001aaa346
LIN fail-safe system basis chip
R2
C1
V
V
V
V
th(reces)(max)
th(dom)(max)
th(reces)(min)
th(dom)(min)
UJA1069
thresholds of
receiving node 1
thresholds of
receiving node 2
© NXP B.V. 2007. All rights reserved.
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