MC10EP446FA ON Semiconductor, MC10EP446FA Datasheet
MC10EP446FA
Specifications of MC10EP446FA
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MC10EP446FA Summary of contents
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... Parallel Interface Can Support PECL, TTL or CMOS • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2009 April, 2009 − Rev. 10 ...
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MC10EP446 MC100EP446 SYNC 29 SYNC BB2 Warning: All V and V pins ...
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Table 2. TRUTH TABLE HIGH Pin CKSEL S : PCLK = 8:1 OUT CLK 1:1 OUT CLK S OUT CKEN Synchronously Disables Normal Parallel to Serial Conversion SYNC Asynchronously Resets Internal Flip−Flops* *The rising edge of SYNC will ...
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Table 5. ATTRIBUTES Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see ...
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Table 7. 10EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...
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Table 8. 10EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...
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Table 9. 10EP DC CHARACTERISTICS, NECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...
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Table 11. 100EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note 15 Output LOW Voltage (Note 15 Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...
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Table 13. AC CHARACTERISTICS Symbol Characteristic f Maximum Frequency max (Figure 15) CKSEL High CKSEL Low t , Propagation Delay to Output Differential PLH t CKSEL = 0 CLK TO S PHL CLK TO PCLK CKSEL = 1 CLK TO ...
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CLK Data Setup Time Figure 4. Setup and Hold Time for Data SYNC SYNC t s CLK CLK Figure 5. Setup Time for SYNC Data Valid − CLK CKEN Figure 6. Setup and Hold ...
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The MC10/100EP446 is an integrated 8:1 parallel to serial converter. An attribute for EP446 is that the parallel inputs D0–D7 (Pins 17 – 24) can be configured to accept either CMOS, ECL, or TTL level signals by a combination of ...
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Similarly, for CKSEL HIGH operation, the time from when the parallel data is latched ¬ to when the data is seen on the th the rising edge of the 14 S OUT on the rising edge of ...
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The device also features a differential SYNC input (Pins 29 and 30), which asynchronously reset all internal flip–flops and clock circuitry on the rising edge of SYNC. The release of SYNC is a synchronous process, which ensures that no runt ...
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For CKSEL HIGH, as shown in the timing diagrams below, the device will start to latch the parallel input data after the falling edge of SYNC ¬, followed by the falling edge CLK , on the second rising edge of ...
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The differential synchronous CKEN inputs (Pins 6 and 7), disable the internal clock circuitry. The synchronous CKEN will suspend all of the device activities and prevent runt pulses from being generated. The rising edge of CKEN followed by the falling ...
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CKSEL Low 600 500 400 300 200 100 0 0 500 1000 INPUT CLOCK FREQUENCY (MHz) Figure 15. Typical V OUTPP Figure 16. SOUT System Jitter Measurement (Condition: 3.4 GHz input frequency, CKSEL HIGH, BEOFE32 bit pattern on ...
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... Device Q Figure 17. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) ORDERING INFORMATION Device MC10EP446FA MC10EP446FAG MC10EP446FAR2 MC10EP446FAR2G MC100EP446FA MC100EP446FAG MC100EP446FAR2 MC100EP446FAR2G MC10EP446MNG MC100EP446MNG MC10EP446MNR4G MC100EP446MNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D ...
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−T− DETAIL −Z− −AB− −AC− SEATING PLANE 0.10 (0.004) AC NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE ...
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... X 0.28 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81− ...