PE42556DI-Z Peregrine Semiconductor, PE42556DI-Z Datasheet - Page 3

• Manufacturer Part Number: PE42556DI-Z
• Description: IC RF SWITCH SPDT FLIP CHIP
• Manufacturer: Peregrine Semiconductor
• Series: UltraCMOS™, HaRP™r

Specifications of PE42556DI-Z

• Rf Type: Cellular
• Frequency: 9kHz ~ 13.5GHz
• Features: SPDT
• Package / Case: 14-XFBGA, FCDSBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PE42556
Product Brief
Figure 3. Bump Configuration (Bumps Up)
Flip Chip Packaging
Table 2. Bump Descriptions
Note: 3. Use VSS (bump 1, VSS = -VDD) to bypass and disable
internal negative voltage generator. Connect VSS (bump 1) to GND
(VSS = 0V) to enable internal negative voltage generator.
Table 3. Operating Ranges
Note: 4. Please consult Figures 4 and 5 (low-frequency graphs) for
recommended low-frequency operating power level.
Document No. 70-0300-01 │ www.psemi.com
Contact [e-mail] for full version of datasheet
V
Voltage
V
Voltage
I
(V
3.6V, -40 to +85 °C)
I
(V
-40 to +85 °C)
I
Current
(V
3.6V, -40 to +85 °C)
Control Voltage High
Control Voltage Low
P
DD
DD
SS
2, 13, 14
3, 5, 7, 9
DD
DD
IN
Bump
ss
ss
ss
Negative Power Supply
No.
Power Supply Current
Power Supply Current
RF Power In
10
11
12
Positive Power Supply
Negative Power Supply
= -3.3V, V
= 0V, V
= -3.3V, V
1
4
6
8
Parameter
GND
GND
Vdd
11
10
RF1
LS
9
8
7
1 MHz ≤ 13.5 GHz
DD
DD
= 3.0 to 3.6V,
DD
D-GND
9 kHz ≤ 1 MHz
Bump
Name
CTRL
4
GND
RFC
D-GND
RF2
RF1
V
V
(50Ω):
CTRL
DGND
= 3.0 to
= 3.0 to
LS
RFC
12
13
14
SS
DD
6
D-GND
GND
Vss
GND
RF2
1
2
3
4
5
Negative supply voltage or GND
connection (Note 3)
Digital Ground
Ground
RF Port 2
RF Common
RF Port 1
Logic Select - Used to determine the
definition for the CTRL pin (see Table 5)
Nominal 3.3 V supply connection
CMOS logic level
0.7xV
Min
-3.6
3.0
DD
Description
-18.0
Typ
21.5
-3.3
3.3
8.0
0.3xV
fig. 4,5
-24.0
Max
29.0
-3.0
12.5
3.6
30
DD
Units
dBm
dBm
µA
µA
µA
V
V
V
V
Table 4. Absolute Maximum Ratings
Note: 5. Please consult Figures 4 and 5 (low-frequency graphs) for
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be restricted to
the limits in the Operating Ranges table. Operation
between operating range maximum and absolute
maximum for extended periods may reduce reliability.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe the
same precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
rating specified.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Table 5. Control Logic Truth Table
Logic Select (LS)
The Logic Select feature is used to determine the
definition for the CTRL pin.
Spurious Performance
The typical spurious performance of the PE42556 is
-116 dBm when VSS=0V (bump 1 = GND). If further
improvement is desired, the internal negative voltage
generator can be disabled by setting VSS = -VDD.
Switching Frequency
The PE42556 has a maximum 25 kHz switching rate
when the internal negative voltage generator is used
(bump1=GND). The rate at which the PE42556 can be
switched is only limited to the switching time (Table 1) if
an external negative supply is provided (bump1=VSS).
P
Symbol
IN
V
V
5
V
V
T
T
CTRL
V
(50Ω)
ESD
DD
ST
OP
LS
I
LS
6. Human Body Model (HBM, MIL_STD 883 Method 3015.7)
0
0
1
1
recommended low-frequency operating power level.
©2010 Peregrine Semiconductor Corp. All rights reserved.
Power supply voltage
Voltage on any input except
for CTRL and LS inputs
Voltage on CTRL input
Voltage on LS input
Storage temperature range
Operating temperature range
9 kHz ≤ 1 MHz
1 MHz ≤ 13.5 GHz
ESD voltage (HBM)
ESD voltage (Machine Model)
Parameter/Conditions
CTRL
0
1
0
1
6
RFC-RF1
off
on
on
off
Min
-0.3
-0.3
-65
-40
fig. 4,5
4000
V
Max
150
300
4.0
0.3
4.0
4.0
RFC-RF2
85
30
DD
Page 3 of 9
+
on
off
off
on
Units
dBm
dBm
°C
°C
V
V
V
V
V
V