ZFSM-101-2-B CEL, ZFSM-101-2-B Datasheet
ZFSM-101-2-B
Specifications of ZFSM-101-2-B
Related parts for ZFSM-101-2-B
ZFSM-101-2-B Summary of contents
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Freescale Semiconductor Technical Data MC13202 2.4 GHz Low Power Transceiver ® for the IEEE 802.15.4 Standard 1 Introduction The MC13202 is a short range, low power, 2.4 GHz Industrial, Scientific, and Medical (ISM) band transceivers. The MC13202 contains a complete ...
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MC13202 operation, refer to the MC13202 Reference Manual, (MC13202RM). Applications include, but are not limited to, the following: • Residential and commercial automation — Lighting control — Security — Access control — Heating, ventilation, air-conditioning (HVAC) ...
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Integrated transmit/receive switch • Dual PA output pairs which can be programmed for full differential single port or dual port operation that supports an external LNA and/or PA • Three power down modes for increased battery life — < ...
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Standard-Compliant MAC • Supports star, mesh and cluster tree topologies • Supports beaconed networks • Supports GTS for low latency • Multiple power saving modes (idle doze, hibernate) 2.1.3 ZigBee-Compliant Network Stack • Supports all ZigBee specifications • ...
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Figure 2 shows the basic system block diagram for the MC13202 in an application. Interface with the transceiver is accomplished through a 4-wire SPI port and interrupt request line. The media access control (MAC), drivers, and network and application software ...
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Receive Path Description In the receive signal path, the RF input is converted to low IF In-phase and Quadrature (I & Q) signals through two down-conversion stages. A Clear Channel Assessment (CCA) can be performed based upon the baseband ...
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Figure 5. Reported Power Level Versus Input Power for Energy Detect or Link Quality Indicator 4.3 Transmit Path Description For the transmit path, the TX data that was previously stored in ...
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Electrical Characteristics 5.1 Maximum Ratings Rating Power Supply Voltage Digital Input Voltage RF Input Power Junction Temperature Storage Temperature Range Note: Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted ...
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DC Electrical Characteristics (V BATT Characteristic Power Supply Current ( BATT 1 Off 1 Hibernate 1 2 Doze (No CLKO) Idle Transmit Mode (0 dBm nominal output power) Receive Mode Input Current ( ...
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AC Electrical Characteristics Table 4. Receiver AC Electrical Characteristics ( BATT DDINT Characteristic Sensitivity for 1% Packet Error Rate (PER) (-40 to +85 °C) Sensitivity for 1% Packet Error Rate (PER) (+25 °C) Saturation (maximum input level) ...
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VDDINT = 2 °C, frequency = 16 MHz, unless otherwise noted. Symbol Parameter T0 SPICLK period T1 Pulse width, SPICLK low T2 Pulse width, SPICLK high T3 Delay time, MISO data valid from falling SPICLK ...
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Functional Description The following sections provide a detailed description of the MC13202 functionality including the operating modes and Serial Peripheral Interface (SPI). 6.1 MC13202 Operational Modes The MC13202 has a number of operational modes that allow for low-current operation. ...
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A typical interconnection to a microcontroller is shown in MCU Shift Register Baud Rate Generator Although the SPI port is fully static, internal memory, timer and interrupt arbiters require an internal clock (CLK ), derived from the crystal reference oscillator, ...
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SPI Transaction Operation Although the SPI port of an MCU transfers data in bursts of 8 bits, the MC13202 requires that a complete SPI transaction be framed by CE, and there will be three (3) or more bursts per ...
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Pin Connections Pin # Pin Name Type 1 RFIN_M RF Input 2 RFIN_P RF Input 3 CT_Bias Control voltage PAO_P RF Output /DC Input RF Power Amplifier Output Positive. 6 PAO_M RF Output/DC Input RF Power ...
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Table 8. Pin Function Description (continued) Pin # Pin Name Type 2 13 RXTXEN Digital Input 2 14 ATTN Digital Input 15 CLKO Digital Output 2 16 SPICLK Digital Clock Input 2 17 MOSI Digital Input 3 18 MISO Digital ...
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Table 8. Pin Function Description (continued) Pin # Pin Name Type 27 XTAL2 Input/Output 28 VDDLO2 Power Input 29 VDDLO1 Power Input 30 VDDVCO Power Output 31 VBATT Power Input 32 VDDA Power Output EP Ground 1 The transceiver GPIO ...
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RFIN_M 2 RFIN_P 3 CT_Bias PAO_P 6 PAO_M GPIO4 MC13202 Figure 10. Pin Connections (Top View) MC13202 ...
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Crystal Oscillator Reference Frequency This section provides application specific information regarding crystal oscillator reference design and recommended crystal usage. 8.1 Crystal Oscillator Design Considerations The 802.15.4 Standard requires that several frequency tolerances be kept within ± 40 ppm accuracy. ...
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Initial tolerance for the internal trim capacitance is approximately ±15%. Since the MC13202 contains an on-chip reference frequency trim capability possible to trim out virtually all of the initial tolerance factors and put the frequency within 0.12 ppm ...
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A wider frequency stability may be acceptable if application uses trimming at production final test wider aging tolerance may be acceptable if application uses trimming at production final test. 5 Higher ESR may be acceptable with lower ...
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MC9S08GT devices have IO signals that are not pinned-out on the package. These signals must also be initialized (even though they cannot be used) to prevent floating inputs. 9 Transceiver RF Configurations and External Connections The MC13202 radio has ...
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Single Port Operation The integrated RF switch allows users to operate in a single port configuration. For Single Port Mode: • An internal RX switch and separate PA are used and pins RFIN_P (PAO_P) and RFIN_M (PAO_M) become bidirectional ...
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Figure 14 shows two dual port configurations. First is a single antenna configuration with an external low noise amplifier (LNA) for greater range. An external antenna switch is used to multiplex the antenna between receive and transmit. An LNA is ...
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Controlling RF Modes of Operation Use of the RF interface pins and RF modes of operation are controlled through several bits of modem Control_B Register 07. Figure 15 highlighted. BIT 15 14 TYPE r/w r/w r/w r/w r/w 0 ...
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Table 10 summarizes the operation of the RF interface control bits. Bit Designation Default 14 ct_bias_en 0 13 ct_bias_inv 0 12 RF_switch_mode 0 9.3 RF Control Output CT_Bias CT_Bias is a useful signal for interface with external RF components. It ...
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Table 11. CT_Bias Output vs. Register Settings (continued) Mode CT_Bias_en TX TX Idle Idle Doze Doze Hibernate Hibernate Off 9.4 RF Single Port Application with an F Antenna Figure 16 shows a typical single port RF application in which part ...
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Packaging Information PIN 1 INDEX AREA 3.25 2.95 EXPOSED DIE ATTACH PAD 25 24 3.25 2.95 0 0.5 32X 0.3 VIEW M-M (45 ) ...
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Freescale Semiconductor NOTES MC13202 Technical Data, Rev. 1.5 ...
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How to Reach Us: Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland ...