SSDSA2CW080G310 Intel, SSDSA2CW080G310 Datasheet - Page 14

• Manufacturer Part Number: SSDSA2CW080G310
• Manufacturer: Intel

Specifications of SSDSA2CW080G310

• Lead Free Status / Rohs Status: Compliant

4.2
4.2.1
Table 9.
Note:
4.2.2
Table 10.
Notes:
1.
2.
3.
4.
5.
6.
Intel
Product Specification
14
®
Solid-State Drive 320 Series
Key and spacing separate signal and power segments.
All mate sequences assume zero angular offset between connectors.
P1 and P2 are internally connected to one another within the device.
Ground connectors P3 and P4 may contact before the other 1st mate pins in both the power and signal connectors to
discharge ESD in a suitably configure backplane connector.
P5 and P6 are not connected internally to the device. The host may put 5V on these pins.
The host may ground P7 if it is not used for Device Activity Signal (DAS).
P8 and P9 should not be connected by the host.
Pin
S1
S2
S3
S4
S5
S6
S7
Pin
P1
P2
P3
P4
P5
P6
P7
Key
P8
P9
2
2
3
3
4
4
5
6
6
Signal Descriptions
Connector Pin Signal Definitions
Serial ATA Connector Pin Signal Definitions —
1.8-inch and 2.5-inch Form Factors
Power Pin Signal Definitions
Serial ATA Power Pin Definitions — 1.8-inch Form Factor
V
V
Ground
Ground
V
V
DAS
Key
Optional
Optional
33
33
5
5
Function
Ground
Ground
Ground
Function
A+
B+
A-
B-
1st mate
Differential signal pair A
1st mate
Differential signal pair B
1st mate
3.3 V Power
3.3 V Power, pre-charge
5 V Power. Not connected
5 V Power. Not connected
Device Activity Signal
NC
Manufacturing Test Pin
Manufacturing Test Pin
Definition
Definition
Intel
Intel
®
®
Solid-State Drive 320 Series
Solid-State Drive 320 Series
Order Number: 325152-001US
Mating Order
2nd Mate
2nd Mate
2nd Mate
2nd Mate
2nd Mate
2nd Mate
1st Mate
1st Mate
1st Mate
NC
March 2011
1