MAX5982CETE+ Maxim Integrated Products, MAX5982CETE+ Datasheet - Page 12

• Manufacturer Part Number: MAX5982CETE+
• Description: Power Switch ICs - POE / LAN PDIC, up to 70W
• Manufacturer: Maxim Integrated Products

Specifications of MAX5982CETE+

• Lead Free Status / Rohs Status: Details

IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with
Depending on the input voltage (V
MAX5982A/MAX5982B/MAX5982C operate in four differ-
ent modes: PD detection, PD classification, mark event,
and PD power. The devices enter PD detection mode
when the input voltage is between 1.4V and 10.1V. The
device enters PD classification mode when the input
voltage is between 12.6V and 20V. The devices enter PD
power mode once the input voltage exceeds V
In detection mode, the power source equipment (PSE)
applies two voltages on V
(1V step minimum) and then records the current measure-
ments at the two points. The PSE then computes DV/DI
to ensure the presence of the 24.9kω signature resistor.
Connect the signature resistor (R
proper signature detection. The MAX5982A/MAX5982B/
MAX5982C pull DET low in detection mode. DET goes
high impedance when the input voltage exceeds 12.5V.
In detection mode, most of the MAX5982A/MAX5982B/
MAX5982C internal circuitry is off and the offset current is
less than 10µA.
If the voltage applied to the PD is reversed, install pro-
tection diodes at the input terminal to prevent internal
damage to the MAX5982A/MAX5982B/MAX5982C (see
the Typical Application Circuit). Since the PSE uses
a slope technique (DV/DI) to calculate the signature
resistance, the DC offset due to the protection diodes is
subtracted and does not affect the detection process.
In the classification mode, the PSE classifies the PD based
on the power consumption required by the PD. This allows
Table 1. Setting Classification Current
*V
12
CLASS
IN
is measured across the MAX5982A/MAX5982B/MAX5982C input V
0
1
2
3
4
5
_____________________________________________________________________________________
POWER USED
0.44 to 12.95
6.49 to 12.95
12.95 to 25.5
0.44 to 3.94
3.84 to 6.49
Classification Mode (12.6V ≤ V
MAXIMUM
BY PD
> 25.5
(W)
Detection Mode (1.4V ≤ V
Detailed Description
IN
in the 1.4V to 10.1V range
DET
R
66.5
43.7
30.9
21.3
615
117
(I)
CLS
Operating Modes
IN
) from V
Integrated 70W High-Power MOSFET
= V
DD
12.6 to 20
12.6 to 20
12.6 to 20
12.6 to 20
12.6 to 20
12.6 to 20
DD
V
(V)
IN
- V
IN
to DET for
ON
IN
*
≤ 10.1V)
SS
≤ 20V)
.
), the
CLASS CURRENT SEEN AT
MIN
17
26
36
54
0
9
the PSE to efficiently manage power distribution. Class
0–5 is defined as shown in Table 1. (The IEEE 802.3af/at
standard defines only Class 0–4 and Class 5 for any spe-
cial requirement.) An external resistor (R
from CLS to V
The PSE determines the class of a PD by applying a volt-
age at the PD input and measuring the current sourced
out of the PSE. When the PSE applies a voltage between
12.6V and 20V, the MAX5982A/MAX5982B/MAX5982C
exhibit a current characteristic with a value shown in
Table 1. The PSE uses the classification current informa-
tion to classify the power requirement of the PD. The
classification current includes the current drawn by R
and the supply current of the MAX5982A/MAX5982B/
MAX5982C so the total current drawn by the PD is within
the IEEE 802.3af/at standard figures. The classification
current is turned off whenever the device is in power mode.
During 2-Event classification, a Type 2 PSE probes PD
for classification twice. In the first classification event,
the PSE presents an input voltage between 12.6V and
20.5V and the MAX5982A/MAX5982B/MAX5982C pres-
ent the programmed load I
the probing voltage below the mark event threshold of
10.1V and the MAX5982A/MAX5982B/MAX5982C pres-
ent the mark current (I
one more time.
When the MAX5982A/MAX5982B/MAX5982C are pow-
ered by a Type 2 PSE, the 2-Event identification output
2EC asserts low after the internal isolation n-channel
MOSFET is fully turned on. 2EC current sink is turned
off when V
and turns on when V
(V
output of the Type 2 PSE detection flag.
ON
DD
V
IN
), unless V
to V
(mA)
SS
DD
.
MAX
SS
12
20
30
44
64
goes below the UVLO threshold (V
4
DD
sets the classification current.
2-Event Classification and Detection
goes below V
DD
MARK
goes above the UVLO threshold
CLASSIFICATION CURRENT
CLASS
). This sequence is repeated
SPECIFICATION (mA)
MIN
16
25
35
51
0
8
IEEE 802.3at PD
THR
. The PSE then drops
to reset the latched
CLS
) connected
MAX
13
21
31
45
68
5
OFF
CLS
)