LFXP6C-3TN144C Lattice, LFXP6C-3TN144C Datasheet - Page 62

• Manufacturer Part Number: LFXP6C-3TN144C
• Description: IC FPGA 5.8KLUTS 100I/O 144-TQFP
• Manufacturer: Lattice

Specifications of LFXP6C-3TN144C

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 220-1262

Lattice Semiconductor
PICs and DDR Data (DQ) Pins Associated with the DDR Strobe (DQS) Pin
P[Edge] [n-4]
P[Edge] [n-3]
P[Edge] [n-2]
P[Edge] [n-1]
P[Edge] [n]
P[Edge] [n+1]
P[Edge] [n+2]
P[Edge] [n+3]
Notes:
1. “n” is a row/column PIC number.
2. The DDR interface is designed for memories that support one DQS strobe per eight bits of data. In some packages, all the potential DDR
3. The definition of the PIC numbering is provided in the Signal Names column of the Signal Descriptions table in this data sheet.
data (DQ) pins may not be available.
PICs Associated
with DQS Strobe
PIO within PIC
A
B
A
B
A
B
A
B
A
B
A
B
A
B
4-3
Complement
Complement
Complement
Complement
Complement
Complement
Complement
Polarity
True
True
True
True
True
True
True
LatticeXP Family Data Sheet
Pinout Information
and Data (DQ) Pins
DDR Strobe (DQS)
[Edge]DQSn
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ