LFE3-35EA-7FN484I Lattice, LFE3-35EA-7FN484I Datasheet - Page 136

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LFE3-35EA-7FN484I

Manufacturer Part Number
LFE3-35EA-7FN484I
Description
IC FPGA 33KLUTS 295I/O 484-BGA
Manufacturer
Lattice
Datasheet

Specifications of LFE3-35EA-7FN484I

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Revision History
Lattice Semiconductor
LatticeECP3 Family Data Sheet
Date
Version
Section
Change Summary
April 2011
01.8EA
DC and Switching
Added data for 150 Mbps to SERDES Power Supply Requirements
(cont.)
(cont.)
Characteristics
table.
Updated Frequencies in Table 3-6 Serial Output Timing and Levels
Added Data for 150 Mbps to Table 3-7 Channel Output Jitter
Corrected External Switching Characteristics table, Description for
DDR3 Clock Timing, t
.
JIT
Corrected Internal Switching Characteristics table, Description for EBR
Timing, t
and t
.
SUWREN_EBR
HWREN_EBR
Added footnote 1 to sysConfig Port Timing Specifications table.
Updated description for RX-CIDs to 150M in Table 3-9 Serial Input Data
Specifications
Updated Frequency to 150 Mbps in Table 3-11 Periodic Receiver Jitter
Tolerance Specification
7-5

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