MT48LC4M32LFF5-10:G TR Micron Technology Inc, MT48LC4M32LFF5-10:G TR Datasheet - Page 61

MT48LC4M32LFF5-10:G TR

Manufacturer Part Number
MT48LC4M32LFF5-10:G TR
Description
Manufacturer
Micron Technology Inc
Type
Mobile SDRAMr
Datasheet

Specifications of MT48LC4M32LFF5-10:G TR

Organization
4Mx32
Density
128Mb
Address Bus
14b
Access Time (max)
22/8/7ns
Maximum Clock Rate
100MHz
Operating Supply Voltage (typ)
3.3V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
110mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
Figure 41:
PDF: 09005aef807f4885/Source: 09005aef8071a76b
128Mbx16x32Mobile_2.fm - Rev. L 10/07 EN
DQMU, DQML
Auto Refresh Mode
COMMAND
A0–A9, A11
BA0, BA1
Notes:
CLK
CKE
A10
DQ
Precharge all
High-Z
t CKS
active banks
t CMS
t AS
SINGLE BANK
ALL BANKS
PRECHARGE
BANK(S)
1. Each AUTO REFRESH command performs a refresh cycle. Back-to-back commands are not
2.
T0
t AH
t CKH
t CMH
required. See Table 17 on page 52.
t
commands must be applied on each positive clock edge during
t CK
RFC must not be interrupted by any executable command; COMMAND INHIBIT or NOP
t RP
T1
NOP
T2
REFRESH
AUTO
t CH
t RFC
61
1, 2
NOP
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NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t CL
Tn + 1
REFRESH
AUTO
128Mb: x16, x32 Mobile SDRAM
t RFC
NOP
1, 2
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NOP
t
©2001 Micron Technology, Inc. All rights reserved.
RFC.
To + 1
ACTIVE
ROW
ROW
BANK
Timing Diagrams
DON’T CARE

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