STM8L151F3P6 STMicroelectronics, STM8L151F3P6 Datasheet - Page 81
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STM8L151F3P6
Manufacturer Part Number
STM8L151F3P6
Description
IC MCU 8BIT 8KB FLASH 20TSSOP
Manufacturer
STMicroelectronics
Series
STM8L EnergyLiter
Datasheet
1.STM8L151G3U6.pdf
(110 pages)
Specifications of STM8L151F3P6
Core Processor
STM8
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, IR, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-TSSOP (0.173", 4.40mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STM8L151F3P6
Manufacturer:
ST
Quantity:
20 000
Company:
Part Number:
STM8L151F3P6TR
Manufacturer:
TYCO
Quantity:
47
STM8L151x2, STM8L151x3
7.3.8
Table 39.
1. Parameters are given by selecting 10 MHz I/O output frequency.
2. Values based on design simulation and/or characterization results, and not tested in production.
3. Min time is for the minimum time to drive the output and max time is for the maximum time to validate the data.
4. Min time is for the minimum time to invalidate the output and max time is for the maximum time to put the data in Hi-Z.
t
t
t
t
dis(SO)
t
w(SCKH)
t
w(SCKL)
su(NSS)
t
a(SO)
Symbol
1/t
t
t
t
t
t
h(NSS)
t
su(MI)
t
v(SO)
v(MO)
h(MO)
su(SI)
h(MI)
h(SO)
t
t
h(SI)
r(SCK)
f(SCK)
f
c(SCK)
SCK
(2)(3)
(2)
(2)(4)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
Communication interfaces
SPI1 - Serial peripheral interface
Unless otherwise specified, the parameters given in
performed under ambient temperature, f
conditions summarized in
the input/output alternate function characteristics (NSS, SCK, MOSI, MISO).
SPI1 characteristics
SPI1 clock frequency
SPI1 clock rise and fall
time
NSS setup time
NSS hold time
SCK high and low time
Data input setup time
Data input hold time
Data output access time
Data output disable time
Data output valid time
Data output valid time
Data output hold time
Parameter
Section
Master mode
Slave mode
Capacitive load: C = 30 pF
Slave mode
Slave mode
Master mode,
f
Master mode
Slave mode
Master mode
Slave mode
Slave mode
Slave mode
Slave mode (after enable edge)
Master mode (after enable
edge)
Slave mode (after enable edge)
Master mode (after enable
edge)
MASTER
Doc ID 018780 Rev 2
7.3.1. Refer to I/O port characteristics for more details on
= 8 MHz, f
Conditions
SYSCLK
SCK
(1)
= 4 MHz
frequency and V
Table 39
4 x 1/f
are derived from tests
Min
105
80
30
15
30
15
0
3
0
1
SYSCLK
0
-
-
-
-
DD
supply voltage
Electrical parameters
3x 1/f
Max
145
30
60
20
SYSCLK
8
8
-
-
-
-
-
-
-
-
-
81/110
Unit
MHz
ns