SI2493-D-FS Silicon Laboratories Inc, SI2493-D-FS Datasheet - Page 118

• Manufacturer Part Number: SI2493-D-FS
• Description: IC ISOMODEM SYSTEM-SIDE 16SOIC
• Manufacturer: Silicon Laboratories Inc

Specifications of SI2493-D-FS

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

AN93
U7C is a bit-mapped register with bits 15:5 and bits 3:1 reserved. U7C resets to 0x0000 with a power-on or manual
reset.
Bit 4 (RIGPO) is output on RI pin when U7C [0] (RIGPOEN) = 1. This allows the RI pin to be configured as a
general-purpose output pin under host processor control. The RI pin must not pulled down. Doing so forces the
modem to enter an undocumented emulation mode.
Bit 0 (RIGPOEN)=0 (default) allows the RI pin to indicate a valid ring signal. When Bit 0 = 1, RI outputs the value of
RIGPO (See Table 80).
U7D is a bit-mapped register with bits 15,13:9, and bits 8:2 reserved. U7D resets to 0x4001 with a power-on or
manual reset.
Bit 14 (NLM) = 0 (default) causes the modem to automatically detect loop current absence or loss. When bit
14 = 1, this feature is disabled.
Bit 12 (TCAL) = 0 (default) when set to 1 forces the DAA to calibrate at a programmable time after going off-hook.
The time between going off-hook and the start of calibration is programmed with U54 [15:8] in 32 ms units.
Bit 11 (OHCT) = 0 (default) when set to 1 forces the DAA to calibrate at the start of dialing. The first dial character
should be a delay (“,”) to prevent interference with the first digit.
Bit 1 (ATZD) = 0 (default) allows the ATZ command to be active. When Bit 1 = 1, the ATZ command is disabled.
Bit 0 (FDP) = 0 (default). FSK data processing stops when the carrier is lost. Unprocessed data are lost. Setting
Bit 0 = 1 causes FSK data processing to continue for up to two bytes of data in the pipeline after carrier is lost.
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*Note: When HDLC or FAST is set, the \N0 (Wire mode) setting must be used.
15:5
Bit
Bit
3:1
1
0
4
0
RIGPOEN 0 = RI pin indicates valid ring signal.
Reserved Read returns zero.
Reserved Read returns zero.
RIGPO
Name
HDLC
Name
FAST
Synchronous Mode.
0 = Normal asynchronous mode.
1 = Transparent HDLC mode.*
Fast Connect. This bit is mutually exclusive with bit 4; only one bit can be enabled at a
given time.
0 = Normal modem handshake timing per ITU/Bellcore standards.
1 = Fast-connect modem handshake timing.*
RI pin
Follow this bit when U7C [0] (RIGPIOEN) = 1.
1 = RI pin follows U7C [4] (RIGPO).
Table 79. U7A Bit Map (Continued)
Table 80. U7C Bit Map
Rev. 1.3
Function
Function