ADP5034ACPZ-1-R7 Analog Devices Inc, ADP5034ACPZ-1-R7 Datasheet - Page 4

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ADP5034ACPZ-1-R7

Manufacturer Part Number
ADP5034ACPZ-1-R7
Description
IC REG BUCK DUAL 3MHZ 24-LFCSP
Manufacturer
Analog Devices Inc
Series
-r
Datasheet

Specifications of ADP5034ACPZ-1-R7

Topology
Step-Down (Buck) Synchronous (2), Linear (LDO) (2)
Function
Any Function
Number Of Outputs
4
Frequency - Switching
3MHz
Voltage/current - Output 1
0.8 V ~ 3.8 V, 1.2A
Voltage/current - Output 2
0.8 V ~ 3.8 V, 1.2A
Voltage/current - Output 3
0.8 V ~ 4.75 V, 300mA
W/led Driver
No
W/supervisor
No
W/sequencer
No
Voltage - Supply
2.3 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
*
Package / Case
*
Operating Temperature Range
-40°C To +125°C
No. Of Regulated Outputs
4
Supply Voltage
5.5V
No. Of Step-down Dc - Dc Converters
2
Digital Ic Case Style
LFCSP
No. Of Ldo Regulators
2
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
ADP5034ACPZ-1-R7TR
ADP5034
BUCK1 AND BUCK2 SPECIFICATIONS
V
specifications, unless otherwise noted.
Table 2.
Parameter
OUTPUT CHARACTERISTICS
VOLTAGE FEEDBACK
OPERATING SUPPLY CURRENT
PSM CURRENT THRESHOLD
SW CHARACTERISTICS
ACTIVE PULL-DOWN
OSCILLATOR FREQUENCY
1
LDO1 AND LDO2 SPECIFICATIONS
V
1 μF; T
Table 3.
Parameter
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT
OUTPUT CHARACTERISTICS
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).
AVIN
IN3
Load Regulation
Bias Current per LDO
Total System Input Current
Output Voltage Accuracy
Line Regulation
Load Regulation
Output Voltage Accuracy
Line Regulation
BUCK1 Only
BUCK2 Only
BUCK1 and BUCK2
SW On Resistance
Current Limit
= (V
LDO1 or LDO2 Only
LDO1 and LDO2 Only
= V
J
= −40°C to +125°C for minimum/maximum specifications, and T
OUT3
IN1
= V
+ 0.5 V) or 1.7 V (whichever is greater) to 5.5 V, V
IN2
3
= 2.3 V to 5.5 V; T
2
Symbol
V
I
I
V
∆V
∆V
∆V
∆V
VIN3BIAS
IN
IN3
OUT3
Symbol
V
V
I
V
I
I
I
I
R
R
R
R
I
R
f
OUT1
IN
IN
IN
PSM
LIMIT1
SW
OUT3
OUT4
OUT3
OUT4
PFET
NFET
PFET
NFET
PDWN-B
OUT1
OUT1
FB1
, V
J
, V
, V
= −40°C to +125°C for minimum/maximum specifications, and T
1
, I
IN4
/∆V
/∆V
/∆I
/∆I
, I
/I
, V
, V
OUT4
OUT2
FB2
VIN4BIAS
LIMIT2
OUT3
OUT4
OUT2
OUT2
IN3
IN4
,
,
Test Conditions/Comments
PWM mode; V
I
PWM mode
I
Models with adjustable outputs
MODE = ground
I
channels disabled
I
channels disabled
I
LDO channels disabled
PSM to PWM operation
V
V
V
V
pFET switch peak current limit
Channel disabled
LOAD1
LOAD
LOAD1
LOAD2
LOAD1
Test Conditions/Comments
I
I
I
Includes all current into AVIN, VIN1, VIN2, VIN3, and
VIN4
I
100 μA < I
V
V
V
V, I
I
I
IN1
IN1
IN1
IN1
OUT3
OUT3
OUT3
OUT3
OUT3
OUT3
IN3
IN3
OUT3
= V
= V
= V
= V
= 0 mA to 1200 mA, PWM mode
= (V
= (V
= I
= 0 mA, device not switching, all other
= 0 mA, device not switching, all other
= I
= I
= I
= I
= I
= I
= I
IN2
IN2
IN2
IN2
= I
LOAD2
LOAD2
OUT4
OUT4
OUT4
OUT4
OUT4
OUT4
OUT3
OUT3
= 3.6 V
= 3.6 V
= 5.5 V
= 5.5 V
OUT4
OUT3
= 0 μA
= 10 mA
= 300 mA
= 0 μA, all other channels disabled
= 0 μA, buck channels disabled
= 1 mA to 300 mA
= 0 mA to 1200 mA
= 0 mA, device not switching,
+ 0.5 V) to 5.5 V, V
+ 0.5 V) to 5.5 V, V
Rev. 0 | Page 4 of 28
IN1
= 1 mA
< 300 mA, 100 μA < I
IN4
= V
= (V
IN2
= 2.3 V to 5.5 V;
OUT4
A
= 25°C for typical specifications, unless otherwise noted.
+ 0.5 V) or 1.7 V (whichever is greater) to 5.5 V; C
IN4
IN4
= (V
= (V
OUT4
OUT4
OUT4
< 300 mA;
+ 0.5 V) to 5.5
+ 0.5 V) to 5.5
Min
−3
0.485
1600
2.5
A
= 25°C for typical
Min
1.7
−3
−0.03
Typ
−0.05
−0.1
0.5
44
55
67
100
155
205
162
137
1950
75
3.0
Typ
10
60
165
53
74
0.001
Max
+3
0.515
240
310
204
243
2300
3.5
Max
5.5
30
100
245
+3
+0.03
0.003
IN
= C
Unit
V
μA
μA
μA
μA
μA
%
%/V
%/mA
OUT
Ω
Unit
%
%/V
%/A
V
μA
μA
μA
mA
mA
MHz
1
=

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