ADM3052BRWZ Analog Devices Inc, ADM3052BRWZ Datasheet - Page 10

• Manufacturer Part Number: ADM3052BRWZ
• Description: 58T4518
• Manufacturer: Analog Devices Inc

Specifications of ADM3052BRWZ

• Interface Type: CAN
• No. Of Rx Buffers: 1
• Digital Ic Case Style: SOIC
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Number Of Transmitters: 1
• Power Supply Requirement: Dual
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Lead Free Status / Rohs Status: Compliant

ADM3052
CIRCUIT DESCRIPTION
ELECTRICAL ISOLATION
In the ADM3052, electrical isolation is implemented on the
logic side of the interface. Therefore, the part has two main
sections: a digital isolation section and a transceiver section
(see Figure 11). The driver input signal, which is applied to the
TxD pin and referenced to the logic ground (GND
across an isolation barrier to appear at the transceiver section
referenced to the isolated ground (V
input and V+SENSE, which is referenced to the isolated ground
in the transceiver section, is coupled across the isolation barrier
to appear at the RxD pin and V+SENSE referenced to the logic
ground respectively.
iCoupler Technology
The digital signals transmit across the isolation barrier using
iCoupler technology. This technique uses chip scale transformer
windings to couple the digital signals magnetically from one
side of the barrier to the other. Digital inputs are encoded into
waveforms that are capable of exciting the primary transformer
winding. At the secondary winding, the induced waveforms are
decoded into the binary value that was originally transmitted.
Positive and negative logic transitions at the input cause narrow
(~1 ns) pulses to be sent to the decoder via the transformer. The
decoder is bistable and is, therefore, set or reset by the pulses,
indicating input logic transitions. In the absence of logic
transitions at the input for more than ~1 μs, a periodic set of
refresh pulses, indicative of the correct input state, are sent to
ensure dc correctness at the output. If the decoder receives no
internal pulses for more than about 5 μs, then the input side is
assumed to be unpowered or nonfunctional, in which case the
output is forced to a default state (see Table 9).
V+SENSE
RxD
TxD
Figure 11. Digital Isolation and Transceiver Sections
DIGITAL ISOLATION
LOGIC SIDE
GND
V
DECODE
ENCODE
DECODE
DD1
1
ISOLATION
BARRIER
ADM3052
ENCODE
DECODE
ENCODE
V
GND
DD2
−
). Similarly, the receiver
BUS SIDE
2
CAN TRANSCEIVER
REGULATOR
D
V+ SENSE
LINEAR
R
C
GND
BUS
INT
V
2
DD2
1
VREF
), is coupled
Rev. PrG | Page 10 of 16
V
V
V
V
CANH
CANL
+R
+
REF
-
TRUTH TABLES
The truth tables in this section use the abbreviations shown
in Table 8.
Table 8. Truth Table Abbreviations
Letter
H
L
I
X
Z
NC
Table 9. Transmitting
V
On
On
On
Off
On
Table 10. Receiving
V
On
On
On
On
Off
On
DD1
DD1
Supply
Supply
Status
Status
V
On
On
On
On
Off
V
On
On
On
On
On
Off
+
+
Input
TxD
L
H
Floating
X
L
V
≥ 0.9V
≤ 0.5V
0.5V < V
Inputs open
X
X
ID
= CANH − CANL
High level
Low level
Indeterminate
Don’t Care
High impedance (off )
Disconnected
Description
Preliminary Technical Data
ID
< 0.9V
Bus State
Dominant
Recessive
Recessive
Recessive
I
Inputs
Bus State
Dominant
Recessive
I
Recessive
X
X
CANH
H
Z
Z
Z
I
Outputs
CANL
L
Z
Z
Z
I
RxD
L
H
I
H
I
H
Outputs
V+Sense
L
L
L
I
H
V+Sense
L
L
L
L
I
H