IDT29FCT52ATQ IDT, Integrated Device Technology Inc, IDT29FCT52ATQ Datasheet - Page 3

• Manufacturer Part Number: IDT29FCT52ATQ
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT29FCT52ATQ

• Logic Family: FCT
• Operating Supply Voltage (typ): 5V
• Propagation Delay Time: 10.5ns
• Number Of Elements: 1
• Number Of Channels: 8
• Input Logic Level: TTL
• Output Logic Level: TTL
• Output Type: 3-State
• Package Type: QSOP
• Polarity: Non-Inverting
• Logical Function: Registered Transceiver
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Quiescent Current (typ): 10uA
• Technology: CMOS
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 24
• Lead Free Status / Rohs Status: Not Compliant

PIN DESCRIPTION
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
OUTPUT DRIVE CHARACTERISTICS
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at T
5. This parameter is guaranteed but not tested.
IDT29FCT52AT/CT
FAST CMOS OCTAL REGISTERED TRANSCEIVER
Symbol
Name
CPA
OEB
CPB
OEA
CEA
CEB
A
B
I
I
I
V
V
V
V
I
V
OZH
OZL
I
OFF
V
0-7
0-7
I
I
CC
OS
IH
I
OH
IL
OL
IH
IL
IK
I
H
A
= –40°C to +85°C, V
I/O
I/O
I/O
Input HIGH Level
Input LOW Level
Input HIGH Current
Input LOW Current
High Impedance Output Current
(3-State Output pins)
Input HIGH Current
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
Output HIGH Voltage
Output LOW Voltage
Short Circuit Current
Input/Output Power Off Leakage
I
I
I
I
I
I
Eight bidirectional lines carrying the A Register inputs or B Register outputs.
Eight bidirectional lines carrying the B Register inputs or A Register outputs.
Clock for the A Register. When CEA is LOW, data is entered into the A Register on the LOW-to-HIGH transition of the CPA signal.
Clock Enable for the A Register. When CEA is LOW, data is entered into the A Register on the LOW-to-HIGH transition of the CPA signal. When
CEA is HIGH, the A Register holds its contents, regardless of CPA signal transitions.
Output Enable for the A Register. When OEB is LOW, the A Register outputs are enabled onto the B
are in the high-impedance state.
Clock for the B Register. When CEB is LOW, data is entered into the B Register on the LOW-to-HIGH transition of the CPB signal.
Clock Enable for the B Register. When CEB is LOW, data is entered into the B Register on the LOW-to-HIGH transition of the CPB signal. When
CEB is HIGH, the B Register holds its contents, regardless of CPB signal transitions.
Output Enable for the B Register. When OEA is LOW, the B Register outputs are enabled onto the A
are in the high-impedance state.
CC
Parameter
= 5.0V, +25°C ambient.
(4)
(4)
(4)
(4)
CC
= 5.0V ±5%
A
= –55°C.
(5)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
V
V
V
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
CC
IN
CC
IN
CC
CC
= V
= V
= Min., I
= Min
= Min
= Max., V
= Max.
= Max.
= Max.
= Max., V
= Max., V
= Max., V
IH
IH
or V
or V
IN
IL
IL
I
IN
O
IN
= –18mA
= V
= GND
= GND or V
or V
CC
Test Conditions
O
(Max.)
≤ 4.5V
(3)
3
Description
CC
—
V
V
V
V
I
I
I
OH
OH
OL
I
I
I
I
(1)
= 2.7V
= 0.5V
= 2.7V
= 0.5V
= 64mA
= –8mA
= –15mA
INDUSTRIAL TEMPERATURE RANGE
0-7
0-7
Min.
–60
2.4
—
—
—
—
—
—
—
—
—
—
—
2
2
lines. When OEB is HIGH, the B
lines. When OEA is HIGH, the A
Typ.
–120
–0.7
0.01
200
3.3
0.3
—
—
—
—
—
—
—
—
3
(2)
Max.
–225
–1.2
0.55
0.8
±1
±1
±1
±1
±1
±1
—
—
—
—
1
0-7
0-7
outputs
outputs
Unit
µ A
µ A
µ A
µ A
mV
µ A
mA
µ A
V
V
V
V
V