S5935QF Applied Micro Circuits Corporation, S5935QF Datasheet - Page 109
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S5935QF
Manufacturer Part Number
S5935QF
Description
Manufacturer
Applied Micro Circuits Corporation
Datasheet
1.S5935QF.pdf
(204 pages)
Specifications of S5935QF
Package Type
PQFP
Rad Hardened
No
Lead Free Status / Rohs Status
Not Compliant
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S5935 – PCI Product
Target Requested Retries
When the S5935 FIFO registers are accessed (S5935
as a target) and data is unavailable (empty FIFO) for
read transfers or cannot be accepted for write trans-
fers (full FIFO), the S5935 immediately terminates the
cycle by requesting a retry. The S5935 also initiates a
retry for Pass-Thru writes where the Add-On has not
completed the preceding Pass-Thru write by asserting
PTRDY#, and for Pass-Thru reads where the Add-On
cannot supply data within 8 PCI clocks (16 clocks for
the first data phase of a burst). A retry is requested by
a target asserting both STOP# and DEVSEL# while
TRDY# is deasserted. Figure 11 shows the behavior of
the S5935 when performing a target-initiated retry.
Figure 56. Target-Initiated Retry
Table 42. Target Termination Types
AMCC Confidential and Proprietary
Termination
PCI CLOCK
FRAME #
IRDY#
TRDY#
STOP#
DEVSEL#
Disconnect
Retry
Abort
DEVSEL#
(T)
(T)
(T)
(I)
(I)
on
on
off
1
STOP#
on
on
on
SIGNALED
TARGET
RETRY
TRDY#
on
off
off
Data is transferred. Transaction needs to be reinitiated to complete.
Data was not transferred. Transaction should be tried later.
Data was not transferred. Fatal error.
2
Target Aborts
A target abort termination represents an error condi-
tion where no number of retries will produce a
successful target access. A target abort is uniquely
identified by the target deasserting DEVSEL# and
TRDY# while STOP# is asserted. When a target per-
forms an abort, it must also set bit 11 of its PCI Status
register. The S5935 configuration and operation regis-
ters never respond with a target abort when accessed.
If the S5935 encounters this condition when operating
as a PCI initiator, the S5935 sets bit 12 (received tar-
get abort) in the PCI Status register. Figure 12 depicts
a target abort cycle.
Target termination types are summarized in Table 2.
+ FRAME# TO RETURN
SEQUENCES IRDY#
3
TO IDLE STATE
INITIATOR
Comment
Revision 1.02 – June 27, 2006
45
(I) = DRIVEN BY INITIATOR
(T) = DRIVEN BY TARGET
Data Book
DS1527
109
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