P80C32 Intel, P80C32 Datasheet - Page 20

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P80C32

Manufacturer Part Number
P80C32
Description
Manufacturer
Intel
Datasheet

Specifications of P80C32

Cpu Family
80C51
Device Core
8051
Device Core Size
8b
Frequency (max)
12MHz
Program Memory Type
ROMLess
Program Memory Size
Not Required
Total Internal Ram Size
256Byte
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
6V
Operating Supply Voltage (min)
4V
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
40
Package Type
PDIP
Lead Free Status / Rohs Status
Not Compliant

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8XC52 54 58
PROGRAMMING ALGORITHM
Refer to Table 4 and Figures 10 and 11 for address
data and control signals set up To program the
87C5X the following sequence must be exercised
20
1 Input the valid address on the address lines
2 Input the appropriate data byte on the data
3 Activate the correct combination of control sig-
4 Raise EA V
5 Pulse ALE PROG 5 times for the EPROM ar-
See Table 4 for proper input on these pins
lines
nals
ray and 25 times for the encryption table and
the lock bits
PP
from V
CC
to 12 75V
Figure 11 Programming Signal’s Waveforms
Figure 10 Programming the EPROM
g
0 25V
Repeat 1 through 5 changing the address and data
for the entire array or until the end of the object file is
reached
PROGRAM VERIFY
Program verify may be done after each byte or block
of bytes is programmed In either case a complete
verify of the programmed array will ensure reliable
programming of the 87C5X
The lock bits cannot be directly verified Verification
of the lock bits is done by observing that their fea-
tures are enabled
272336 –21
272336–22

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