IDT74FCT162H501ATPV IDT, Integrated Device Technology Inc, IDT74FCT162H501ATPV Datasheet

IDT74FCT162H501ATPV

Manufacturer Part Number

IDT74FCT162H501ATPV

Description

Manufacturer

IDT, Integrated Device Technology Inc

Datasheet

1.IDT74FCT162H501ATPV.pdf (9 pages)

Specifications of IDT74FCT162H501ATPV

Operating Supply Voltage (typ)

Propagation Delay Time

5.6ns

Number Of Channels

Output Type

3-State

Package Type

SSOP

Operating Supply Voltage (min)

4.5V

Operating Supply Voltage (max)

5.5V

Operating Temp Range

-40C to 85C

Operating Temperature Classification

Industrial

Mounting

Surface Mount

Pin Count

Lead Free Status / Rohs Status

Not Compliant

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FEATURES:

• Common features:

• Features for FCT16501AT/CT/ET:

• Features for FCT162501AT/CT/ET:

• Features for FCT162H501AT/CT/ET:

DESCRIPTION:

bit registered transceivers are built using advanced dual metal

FUNCTIONAL BLOCK DIAGRAM

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

MILITARY AND COMMERCIAL TEMPERATURE RANGES

1996 Integrated Device Technology, Inc.

– 0.5 MICRON CMOS Technology

– High-speed, low-power CMOS replacement for

– Typical t

– Low input and output leakage

– ESD > 2000V per MIL-STD-883, Method 3015;

– Packages include 25 mil pitch SSOP, 19.6 mil pitch

– Extended commercial range of -40 C to +85 C

– High drive outputs (-32mA I

– Power off disable outputs permit “live insertion”

– Typical V

– Balanced Output Drivers:

– Reduced system switching noise

– Typical V

– Bus Hold retains last active bus state during 3-state

– Eliminates the need for external pull up resistors

Integrated Device Technology, Inc.

The FCT16501AT/CT/ET and FCT162501AT/CT/ET 18-

ABT functions

> 200V using machine model (C = 200pF, R = 0)

TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack

= 5V, T

= 5V,T

CLKBA

CLKAB

OEBA

OLP

OEAB

LEBA

LEAB

(o) (Output Skew) < 250ps

= 25 C

(Output Ground Bounce) < 1.0V at

(Output Ground Bounce) < 0.6V at

= 25 C

24mA (commercial),

16mA (military)

, 64mA I

1 A (max.)

FAST CMOS

18-BIT REGISTERED

TRANSCEIVER

)

TO 17 OTHER CHANNELS

5.10

CMOS technology. These high-speed, low-power 18-bit reg-

istered bus transceivers combine D-type latches and D-type

flip-flops to allow data flow in transparent, latched and clocked

modes. Data flow in each direction is controlled by output-

enable (OEAB and

and clock (CLKAB and CLKBA) inputs. For A-to-B data flow,

the device operates in transparent mode when LEAB is HIGH.

When LEAB is LOW, the A data is latched if CLKAB is held at

a HIGH or LOW logic level. If LEAB is LOW, the A bus data

is stored in the latch/flip-flop on the LOW-to-HIGH transition of

CLKAB. OEAB is the output enable for the B port. Data flow

from the B port to the A port is similar but requires using

LEBA and CLKBA. Flow-through organization of signal pins

simplifies layout. All inputs are designed with hysteresis for

improved noise margin.

high-capacitance loads and low-impedance backplanes. The

output buffers are designed with power off disable capability

to allow "live insertion" of boards when used as backplane

drivers.

with current limiting resistors. This offers low ground bounce,

minimal undershoot, and controlled output fall times–reducing

the need for external series terminating resistors.

FCT162501AT/CT/ET are plug-in replacements for the

FCT16501AT/CT/ET and ABT16501 for on-board bus inter-

face applications.

tains the input's last state whenever the input goes to high

impedance. This prevents "floating" inputs and eliminates the

need for pull-up/down resistors.

The FCT16501AT/CT/ET are ideally suited for driving

The FCT162501AT/CT/ET have balanced output drive

The FCT162H501AT/CT/ET have "Bus Hold" which re-

IDT54/74FCT162H501AT/CT/ET

IDT54/74FCT162501AT/CT/ET

IDT54/74FCT16501AT/CT/ET

OEBA

), latch enable (LEAB and LEBA)

2547 drw 01

AUGUST 1996

DSC-2547/8

OEBA

The

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IDT74FCT162H501ATPV Summary of contents

Page 1

... FAST CMOS 18-BIT REGISTERED TRANSCEIVER CMOS technology. These high-speed, low-power 18-bit reg- istered bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes. Data flow in each direction is controlled by output- enable (OEAB and and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in transparent mode when LEAB is HIGH ...

Page 2

IDT54/74FCT16501AT/CT/ET, 162501AT/CT/ET, 162H501AT/CT/ET FAST CMOS 18-BIT REGISTERED TRANSCEIVER PIN CONFIGURATIONS OEAB 1 56 GND LEAB 2 55 CLKAB GND 4 53 GND ...

Page 3

IDT54/74FCT16501AT/CT/ET, 162501AT/CT/ET, 162H501AT/CT/ET FAST CMOS 18-BIT REGISTERED TRANSCEIVER PIN DESCRIPTION Pin Names Description OEAB A-to-B Output Enable Input OEBA B-to-A Output Enable Input (Active LOW) LEAB A-to-B Latch Enable Input LEBA B-to-A Latch Enable Input CLKAB A-to-B Clock Input CLKBA ...

Page 4

IDT54/74FCT16501AT/CT/ET, 162501AT/CT/ET, 162H501AT/CT/ET FAST CMOS 18-BIT REGISTERED TRANSCEIVER DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE (STANDARD PARTS) Following Conditions Apply Unless Otherwise Specified: Commercial – + Symbol Parameter V Input HIGH Level IH V ...

Page 5

IDT54/74FCT16501AT/CT/ET, 162501AT/CT/ET, 162H501AT/CT/ET FAST CMOS 18-BIT REGISTERED TRANSCEIVER DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE (BUS HOLD) Following Conditions Apply Unless Otherwise Specified: Commercial – + Symbol Parameter V Input HIGH Level IH V ...

Page 6

IDT54/74FCT16501AT/CT/ET, 162501AT/CT/ET, 162H501AT/CT/ET FAST CMOS 18-BIT REGISTERED TRANSCEIVER POWER SUPPLY CHARACTERISTICS Symbol Parameter I Quiescent Power Supply CC Current TTL Inputs HIGH I Dynamic Power Supply Current CCD I Total Power Supply Current C NOTES: 1. For conditions shown as ...

Page 7

IDT54/74FCT16501AT/CT/ET, 162501AT/CT/ET, 162H501AT/CT/ET FAST CMOS 18-BIT REGISTERED TRANSCEIVER SWITCHING CHARACTERISTICS OVER OPERATING RANGE Symbol Parameter (4) f CLKAB or CLKBA frequency MAX t Propagation Delay PLH PHL t Propagation Delay PLH t ...

Page 8

IDT54/74FCT16501AT/CT/ET, 162501AT/CT/ET, 162H501AT/CT/ET FAST CMOS 18-BIT REGISTERED TRANSCEIVER TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS OUT IN Pulse D.U.T. Generator R T SET-UP, HOLD AND RELEASE TIMES DATA INPUT t SU TIMING INPUT ASYNCHRONOUS ...

Page 9

IDT54/74FCT16501AT/CT/ET, 162501AT/CT/ET, 162H501AT/CT/ET FAST CMOS 18-BIT REGISTERED TRANSCEIVER ORDERING INFORMATION X IDT FCT X X Temperature Drive Bus Hold Device Type Range XXXX X X Package Process 5.10 MILITARY AND COMMERCIAL TEMPERATURE RANGES Blank Commercial B MIL-STD-883, Class B PV ...

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