CY7C168A-25PC Cypress Semiconductor Corp, CY7C168A-25PC Datasheet - Page 4
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CY7C168A-25PC
Manufacturer Part Number
CY7C168A-25PC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C168A-25PC.pdf
(10 pages)
Specifications of CY7C168A-25PC
Density
16Kb
Access Time (max)
25ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Address Bus
12b
Package Type
PDIP
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
90mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
20
Word Size
4b
Number Of Words
4K
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C168A-25PC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Switching Waveforms
Switching Characteristics
Document #: 38-05029 Rev. **
Notes:
10. WE is HIGH for read cycle.
11. Device is continuously selected, CE = V
READ CYCLE
t
t
t
t
t
t
t
t
t
t
WRITE CYCLE
t
t
t
t
t
t
t
t
t
t
6.
7.
8.
9.
Parameter
Read Cycle No. 1
RC
AA
OHA
ACE
LZCE
HZCE
PU
PD
RCS
RCH
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
DATA OUT
ADDRESS
Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
I
At any given temperature and voltage condition, t
(b) of AC Test Loads and Waveforms.
t
The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signal must be LOW to initiate a write and either signal can terminate a
write by going high. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
OL
HZCE
/I
OH
and t
and 30-pF load capacitance.
HZWE
Read Cycle Time
Address to Data Valid
Output Hold from Address Change
Power Supply Current
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power Up
CE HIGH to Power-Down
Read Command Set-Up
Read Command Hold
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low Z
WE LOW to High Z
[9]
are tested with C
[10, 11]
PREVIOUS DATA VALID
Description
L
= 5 pF as in part (a) of Test Loads and Waveforms. Transition is measured 500 mV from steady state voltage.
[7]
[7, 8]
[7]
[7, 8]
Over the Operating Range
IL
.
t
OHA
HZ
is less than t
t
AA
7C168A-15
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
15
15
12
12
12
10
5
5
0
0
0
0
0
0
7
5
LZ
for all devices. Transition is measured 500 mV from steady state voltage with specified loading in part
15
15
15
8
[2,6]
t
RC
7C168A-20
20
20
15
15
15
10
5
5
0
0
0
0
0
0
7
5
20
20
20
8
7C168A-25
25
20
20
20
15
10
5
5
0
0
0
0
0
0
7
5
25
25
10
20
DATA VALID
7C168A-35
35
25
25
25
20
15
5
5
0
0
0
0
0
0
5
5
35
35
15
20
7C168A-45
45
40
30
30
20
15
10
CY7C168A
5
5
0
0
0
0
0
0
5
C168A-5
Page 4 of 10
45
45
15
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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