M28W320ECB70ZB6 Micron Technology Inc, M28W320ECB70ZB6 Datasheet
M28W320ECB70ZB6
Specifications of M28W320ECB70ZB6
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M28W320ECB70ZB6 Summary of contents
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... Bottom Device Code, M28W320ECB: 88BBh October 2002 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. M28W320ECT M28W320ECB 32 Mbit (2Mb x16, Boot Block) 3V Supply Flash Memory Figure 1. Packages FBGA TFBGA47 (ZB) 6.39 x 6.37mm TSOP48 (N) ...
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M28W320ECT, M28W320ECB TABLE OF CONTENTS SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Block Lock-Down Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Table 23. Daisy Chain Ordering Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 APPENDIX A. BLOCK ADDRESS TABLES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 24. Top Boot Block Addresses, M28W320ECT Table 25. Bottom Boot Block Addresses, M28W320ECB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 APPENDIX B. COMMON FLASH INTERFACE (CFI Table 26. Query Structure Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 27. CFI Query Identification String . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 28. CFI Query System Interface Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 29 ...
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... SUMMARY DESCRIPTION The M28W320EC Mbit (2 Mbit x 16) non- volatile Flash memory that can be erased electri- cally at the block level and programmed in-system on a Word-by-Word basis. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. V allows to drive the I/O pin DDQ down to 1 ...
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M28W320ECT, M28W320ECB Figure 3. TSOP Connections 6/52 A15 1 48 A14 A13 A12 A11 A10 A20 M28W320ECT M28W320ECB A19 A18 A17 ...
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Figure 4. TFBGA Connections (Top view through package A13 B A14 A15 C D A16 E V DDQ A11 A10 W RP A18 A12 A9 A20 DQ11 ...
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M28W320ECT, M28W320ECB Figure 5. Block Addresses M28W320ECT Top Boot Block Addresses 1FFFFF 4 KWords 1FF000 1F8FFF 4 KWords 1F8000 1F7FFF 32 KWords 1F0000 00FFFF 32 KWords 008000 007FFF 32 KWords 000000 Note: Also see Appendix A, Tables 24 and 25 ...
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SIGNAL DESCRIPTIONS See Figure 2 Logic Diagram and Table 1,Signal Names, for a brief overview of the signals connect this device. Address Inputs (A0-A20). The Address Inputs select the cells in the memory array to access dur- ing ...
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... Read. Read Bus operations are used to output the contents of the Memory Array, the Electronic Signature, the Status Register and the Common Flash Interface. Both Chip Enable and Output En- able must order to perform a read op- IL eration. The Chip Enable input should be used to enable the device ...
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... Read Query Com- mand. Once the command is issued subsequent Bus Read operations read from the Common Flash Interface Memory Area. See Appendix B, Common Flash Interface, Tables 26, 27, 28, 29, 30 and 31 for details on the information contained in the Common Flash Interface memory area. Block Erase Command The Block Erase command can be used to erase a block ...
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M28W320ECT, M28W320ECB The second latches the block address in the internal state machine and starts the Program/ Erase Controller. If the second bus cycle is not Write Erase Confirm (D0h), Status Register bits b4 and b5 are set and the ...
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During Program/Erase Suspend the Command In- terface will accept the Program/Erase Resume, Read Array, Read Status Register, Read Electron- ic Signature and Read CFI Query commands. Ad- ditionally, if the suspend operation was Erase then the Program, Double Word Program, ...
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M28W320ECT, M28W320ECB The lock status can be monitored for each block using the Read Electronic Signature command. Locked-Down blocks revert to the locked (and not locked-down) state when the device is reset on Table 4. Commands Commands 1st Cycle Op. ...
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Table 5. Read Electronic Signature Code Device Manufacture. Code M28W320ECT Device Code M28W320ECB Note Table 6. Read Block Lock Signature Block Status E G Locked Block Unlocked Block IL ...
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M28W320ECT, M28W320ECB Table 8. Program, Erase Times and Program/Erase Endurance Cycles Parameter Word Program Double Word Program Quadruple Word Program Main Block Program Parameter Block Program Main Block Erase Parameter Block Erase Program/Erase Cycles (per Block) Note: 1. Typical time ...
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BLOCK LOCKING The M28W320EC features an instant, individual block locking scheme that allows any block to be locked or unlocked with no latency. This locking scheme has three levels of protection. Lock/Unlock - this first level allows software- only control ...
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M28W320ECT, M28W320ECB Table 9. Block Lock Status Item Block Lock Configuration Block is Unlocked Block is Locked Block is Locked-Down Table 10. Protection Status Current (1) Protection Status (WP, DQ1, DQ0) Program/Erase Current State Allowed 1,0,0 yes (2) no 1,0,1 ...
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STATUS REGISTER The Status Register provides information on the current or previous Program or Erase operation. The various bits convey information and errors on the operation. To read the Status register the Read Status Register command can be issued, re- ...
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M28W320ECT, M28W320ECB gram/Erase Controller Status bit is High (Program/ Erase Controller inactive). Bit 2 is set within 5µs of the Program/Erase Suspend command being is- sued therefore the memory may still complete the operation rather than entering the Suspend mode. ...
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MAXIMUM RATING Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause per- manent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above ...
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M28W320ECT, M28W320ECB DC AND AC PARAMETERS This section summarizes the operating and mea- surement conditions, and the DC and AC charac- teristics of the device. The parameters in the DC and AC characteristics Tables that follow, are de- rived from ...
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Table 15. DC Characteristics Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO I Supply Current (Read) DD Supply Current (Stand- DD1 Automatic Stand-by) Supply Current I DD2 (Reset) I Supply Current (Program) DD3 I ...
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M28W320ECT, M28W320ECB Figure 9. Read AC Waveforms A0-A20 E G DQ0-DQ15 ADDR. VALID CHIP ENABLE Table 16. Read AC Characteristics Symbol Alt t t Address Valid to Next Address Valid AVAV Address Valid to Output Valid AVQV ...
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Figure 10. Write AC Waveforms, Write Enable Controlled M28W320ECT, M28W320ECB 25/52 ...
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M28W320ECT, M28W320ECB Table 17. Write AC Characteristics, Write Enable Controlled Symbol Alt t t Write Cycle Time AVAV Address Valid to Write Enable High AVWH Data Valid to Write Enable High DVWH DS t ...
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Figure 11. Write AC Waveforms, Chip Enable Controlled M28W320ECT, M28W320ECB 27/52 ...
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M28W320ECT, M28W320ECB Table 18. Write AC Characteristics, Chip Enable Controlled Symbol Alt t t Write Cycle Time AVAV Address Valid to Chip Enable High AVEH Data Valid to Chip Enable High DVEH DS Chip ...
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Figure 12. Power-Up and Reset AC Waveforms tVDHPH VDD, VDDQ Table 19. Power-Up and Reset AC Characteristics Symbol Parameter t PHWL Reset High to Write Enable Low, Chip t PHEL Enable Low, Output Enable Low t ...
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M28W320ECT, M28W320ECB PACKAGE MECHANICAL Figure 13. TSOP48 - 48 lead Plastic Thin Small Outline 20mm, Package Outline 1 N/2 TSOP-a Note: Drawing is not to scale. Table 20. TSOP48 - 48 lead Plastic Thin Small Outline ...
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Figure 14. TFBGA47 6.39x6.37mm - 8x6 ball array, 0.75mm pitch, Bottom View Package Outline BALL "A1" A Note: Drawing is not to scale. Table 21. TFBGA47 6.39x6.37mm - 8x6 ball array, 0.75mm pitch, Package Mechanical ...
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M28W320ECT, M28W320ECB Figure 15. TFBGA47 Daisy Chain - Package Connections (Top view through package Figure 16. TFBGA47 Daisy Chain - PCB Connections proposal (Top view through package ...
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PART NUMBERING Table 22. Ordering Information Scheme Example: Device Type M28 Operating Voltage 2.7V to 3.6V 1.65V to 3.6V DD DDQ Device Function 320EC = 32 Mbit (2 Mb x16), Boot Block Array Matrix ...
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M28W320ECT, M28W320ECB APPENDIX A. BLOCK ADDRESS TABLES Table 24. Top Boot Block Addresses, M28W320ECT Size # Address Range (KWord 1FF000-1FFFFF 1 4 1FE000-1FEFFF 2 4 1FD000-1FDFFF 3 4 1FC000-1FCFFF 4 4 1FB000-1FBFFF 5 4 1FA000-1FAFFF 6 4 1F9000-1F9FFF ...
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Table 25. Bottom Boot Block Addresses, M28W320ECB Size # Address Range (KWord 1F8000-1FFFFF 69 32 1F0000-1F7FFF 68 32 1E8000-1EFFFF 67 32 1E0000-1E7FFF 66 32 1D8000-1DFFFF 65 32 1D0000-1D7FFF 64 32 1C8000-1CFFFF 63 32 1C0000-1C7FFF 62 32 1B8000-1BFFFF 61 ...
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... APPENDIX B. COMMON FLASH INTERFACE (CFI) The Common Flash Interface is a JEDEC ap- proved, standardized data structure that can be read from the Flash memory device. It allows a system software to query the device to determine various electrical and timing parameters, density information and functions supported by the mem- ory ...
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Table 28. CFI Query System Interface Information Offset Data V Logic Supply Minimum Program/Erase or Write voltage DD 1Bh 0027h V Logic Supply Maximum Program/Erase or Write voltage DD 1Ch 0036h V [Programming] Supply Minimum Program/Erase voltage PP 1Dh 00B4h ...
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... M28W320ECT, M28W320ECB Table 29. Device Geometry Definition Offset Word Data Mode 27h 0016h Device Size = 2 28h 0001h Flash Device Interface Code description 29h 0000h 2Ah 0003h Maximum number of bytes in multi-byte program or page = 2 2Bh 0000h Number of Erase Block Regions within the device. 2Ch ...
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Table 30. Primary Algorithm-Specific Extended Query Table Offset Data ( 35h (P+0)h = 35h 0050h (P+1)h = 36h 0052h Primary Algorithm extended Query table unique ASCII string “PRI” (P+2)h = 37h 0049h (P+3)h = 38h 0031h Major version ...
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M28W320ECT, M28W320ECB Table 31. Security Code Area Offset Data 80h 00XX Protection Register Lock 81h XXXX 82h XXXX 64 bits: unique device number 83h XXXX 84h XXXX 85h XXXX 86h XXXX 87h XXXX 88h XXXX 128 bits: User Programmable OTP ...
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... Note: 1. Status check of b1 (Protected Block sequence error is found, the Status Register must be cleared before further Program/Erase Controller operations. program_command (addressToProgram, dataToProgram) {: writeToFlash (any_address, 0x40) ; /*or writeToFlash (any_address, 0x10 writeToFlash (addressToProgram, dataToProgram) ; /*Memory enters read status state after the Program Command status_register=readFlash (any_address) ; ...
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... If an error is found, the Status Register must be cleared before further Program/Erase operations. 3. Address 1 and Address 2 must be consecutive addresses differing only for bit A0. 42/52 double_word_program_command (addressToProgram1, dataToProgram1, { writeToFlash (any_address, 0x30) ; writeToFlash (addressToProgram1, dataToProgram1) ; writeToFlash (addressToProgram2, dataToProgram2) ; /*Memory enters read status state after the Program command status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 ...
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... Address 1 to Address 4 must be consecutive addresses differing only for bits A0 and A1. quadruple_word_program_command (addressToProgram1, dataToProgram1, { writeToFlash (any_address, 0x56) ; writeToFlash (addressToProgram1, dataToProgram1) ; writeToFlash (addressToProgram2, dataToProgram2) ; writeToFlash (addressToProgram3, dataToProgram3) ; writeToFlash (addressToProgram4, dataToProgram4) ; /*Memory enters read status state after the Program command status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 ...
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... must be toggled*/ } while (status_register.b7 writeToFlash (any_address, 0xFF) ; read_data ( ) ; /*read data from another block*/ /*The device returns to Read Array (as if program/erase suspend was not issued).*/ } { writeToFlash (any_address, 0xFF) ; read_data ( ); /*read data from another address*/ writeToFlash (any_address, 0xD0) ; /*write 0xD0 to resume program*/ } AI03540b ...
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... YES YES End Note error is found, the Status Register must be cleared before further Program/Erase operations. erase_command ( blockToErase ) { writeToFlash (any_address, 0x20) ; writeToFlash (blockToErase, 0xD0 only A12-A20 are significannt */ /* Memory enters read status state after the Erase Command */ do { status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 ...
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... must be toggled*/ } while (status_register.b7 writeToFlash (any_address, 0xFF) ; read_data ( ) ; /*read data from another block*/ /*The device returns to Read Array (as if program/erase suspend was not issued).*/ } { writeToFlash (any_address, 0xFF) ; read_program_data ( ); /*read or program data from another address*/ writeToFlash (any_address, 0xD0) ; /*write 0xD0 to resume erase*/ } AI03542b ...
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... NO error_handler () ; /*Check the locking state (see Read Block Signature table )*/ writeToFlash (any_address, 0xFF) ; /*Reset to Read Array mode*/ } M28W320ECT, M28W320ECB AI04364 47/52 ...
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... End Note: 1. Status check of b1 (Protected Block sequence error is found, the Status Register must be cleared before further Program/Erase Controller operations. 48/52 protection_register_program_command (addressToProgram, dataToProgram) {: writeToFlash (any_address, 0xC0) ; writeToFlash (addressToProgram, dataToProgram) ; /*Memory enters read status state after the Program Command status_register=readFlash (any_address) ; ...
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APPENDIX D. COMMAND INTERFACE AND PROGRAM/ERASE CONTROLLER STATE Table 32. Write State Machine Current/Next, sheet Data Current SR Read When State bit 7 Array Read (FFh) Read Array “1” Array Read Array Prog.Setup Read “1” Status Read ...
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M28W320ECT, M28W320ECB Table 33. Write State Machine Current/Next, sheet Current State Read Elect.Sg. (90h) Read Array Read Elect.Sg. Read CFI Query Read Status Read Elect.Sg. Read CFI Query Read Elect.Sg. Read Elect.Sg. Read CFI Query Read CFI ...
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REVISION HISTORY Table 34. Document Revision History Date Version 10-Sep-2001 -01 06-Nov-2001 -02 17-Jun-2002 -03 03-Oct-2002 3.1 Revision Details First Issue V Maximum changed to 3.3V DDQ Commands Table, Read CFI Query Address on 1st cycle changed to ‘X’ (Table ...
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M28W320ECT, M28W320ECB Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from ...